| /external/replicaisland/src/com/replica/replicaisland/ |
| GLErrorLogger.java | 713 public void glBufferData(int arg0, int arg1, Buffer arg2, int arg3) {
714 ((GL11)mGL).glBufferData(arg0, arg1, arg2, arg3);
718 public void glBufferSubData(int arg0, int arg1, int arg2, Buffer arg3) {
719 ((GL11)mGL).glBufferSubData(arg0, arg1, arg2, arg3);
743 public void glColor4ub(byte arg0, byte arg1, byte arg2, byte arg3) {
744 ((GL11)mGL).glColor4ub(arg0, arg1, arg2, arg3);
748 public void glColorPointer(int arg0, int arg1, int arg2, int arg3) {
749 ((GL11)mGL).glColorPointer(arg0, arg1, arg2, arg3);
1194 public int glQueryMatrixxOES(int[] arg0, int arg1, int[] arg2, int arg3) {
1195 int result = ((GL10Ext)mGL).glQueryMatrixxOES(arg0, arg1,arg2, arg3);
[all...] |
| /external/deqp/modules/gles3/performance/ |
| es3pStateChangeCallTests.cpp | 145 const TYPE3 arg3 = args3[baseNdx%DE_LENGTH_OF_ARRAY(args3)];\
146 gl.FUNCNAME(arg0, arg1, arg2, arg3);\
175 const TYPE3 arg3 = args3[baseNdx%DE_LENGTH_OF_ARRAY(args3)];\
177 gl.FUNCNAME(arg0, arg1, arg2, arg3, arg4);\
207 const TYPE3 arg3 = args3[baseNdx%DE_LENGTH_OF_ARRAY(args3)];\
210 gl.FUNCNAME(arg0, arg1, arg2, arg3, arg4, arg5);\
|
| /external/llvm/test/Transforms/RewriteStatepointsForGC/ |
| relocation.ll | 160 define void @test6(i8 addrspace(1)* %arg1, i8 addrspace(1)* %arg2, i8 addrspace(1)* %arg3) gc "statepoint-example" {
170 ; CHECK: arg3.relocated =
171 call void @foo() [ "deopt"(i8 addrspace(1)* %arg1, i8 addrspace(1)* %arg2, i8 addrspace(1)* %arg3) ]
177 ; CHECK-DAG: [ %arg3, %entry ]
178 ; CHECK-DAG: [ %arg3.relocated, %do_safepoint ]
185 call void (...) @use(i8 addrspace(1)* %arg1, i8 addrspace(1)* %arg2, i8 addrspace(1)* %arg3)
|
| /external/apache-xml/src/main/java/org/apache/xml/serializer/ |
| ToTextSAXHandler.java | 202 String arg3,
278 Attributes arg3)
282 super.startElement(arg0, arg1, arg2, arg3);
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| sgpr-copy.ll | 14 define amdgpu_ps void @phi1(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 {
38 define amdgpu_ps void @phi2(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 {
61 %tmp40 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %arg3, <2 x i32> %arg5)
62 %tmp41 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %arg3, <2 x i32> %arg5)
63 %tmp42 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %arg3, <2 x i32> %arg5)
64 %tmp43 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %arg3, <2 x i32> %arg5)
65 %tmp44 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %arg3, <2 x i32> %arg5)
159 define amdgpu_ps void @loop(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 {
230 define amdgpu_ps void @sample_v3([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <8 x i32>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 {
294 define amdgpu_ps void @copy2([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <8 x i32>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %a (…)
[all...] |
| wait.ll | 14 define amdgpu_vs void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, <16 x i8> addrspace(2)* inreg %arg3, <16 x i8> addrspace(2)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float addrspace(2)* inreg %constptr) {
16 %tmp = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg3, i32 0
25 %tmp16 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg3, i32 1
|
| llvm.SI.load.dword.ll | 17 define amdgpu_vs void @main([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <32 x i8>] addrspace(2)* byval %arg2, [2 x <16 x i8>] addrspace(2)* byval %arg3, [17 x <16 x i8>] addrspace(2)* inreg %arg4, [17 x <16 x i8>] addrspace(2)* inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9) {
19 %tmp = getelementptr [2 x <16 x i8>], [2 x <16 x i8>] addrspace(2)* %arg3, i64 0, i32 1
|
| /external/llvm/test/Transforms/IndVarSimplify/ |
| eliminate-rem.ll | 10 define void @simple(i64 %arg, double* %arg3) nounwind {
21 %t8 = getelementptr inbounds double, double* %arg3, i64 %t7 ; <double*> [#uses=1]
41 define i32 @f(i64* %arg, i64 %arg1, i64 %arg2, i64 %arg3) nounwind {
|
| /external/swiftshader/third_party/LLVM/test/Transforms/IndVarSimplify/ |
| eliminate-rem.ll | 10 define void @simple(i64 %arg, double* %arg3) nounwind {
21 %t8 = getelementptr inbounds double* %arg3, i64 %t7 ; <double*> [#uses=1]
41 define i32 @f(i64* %arg, i64 %arg1, i64 %arg2, i64 %arg3) nounwind {
|
| /test/vts/compilation_tools/vtsc/test/golden/DRIVER/ |
| BluetoothHalV1bt_interface_t.driver.cpp | 46 remote_device_properties_cb(bt_status_t arg0, bt_bdaddr_t* arg1, int32_t arg2, bt_property_t* arg3) {
88 pin_request_cb(bt_bdaddr_t* arg0, bt_bdname_t* arg1, uint32_t arg2, bool arg3) {
108 ssp_request_cb(bt_bdaddr_t* arg0, bt_bdname_t* arg1, uint32_t arg2, bt_ssp_variant_t arg3, uint32_t arg4) {
|
| /bionic/libc/arch-x86_64/bionic/ |
| syscall.S | 36 * %rcx: arg3 - syscall expects it at %r10
|
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/ |
| UsbSbd.asl | 44 // Arg3: Package Parameters
|
| /external/apache-harmony/support/src/test/java/tests/support/ |
| Support_DummyPKCS12Keystore.java | 65 Certificate[] arg3) throws KeyStoreException {
|
| /external/dng_sdk/source/ |
| dng_safe_arithmetic.h | 85 bool SafeUint32Mult(std::uint32_t arg1, std::uint32_t arg2, std::uint32_t arg3,
87 bool SafeUint32Mult(std::uint32_t arg1, std::uint32_t arg2, std::uint32_t arg3,
95 std::uint32_t arg3);
97 std::uint32_t arg3, std::uint32_t arg4);
|
| /external/eigen/unsupported/Eigen/CXX11/src/Tensor/ |
| TensorSyclExtractAccessor.h | 55 template<typename Arg1, typename Arg2, typename Arg3> static inline auto getTuple(cl::sycl::handler& cgh, Arg1 eval1 , Arg2 eval2 , Arg3 eval3)
56 -> decltype(utility::tuple::append(ExtractAccessor<Arg1>::getTuple(cgh, eval1),utility::tuple::append(ExtractAccessor<Arg2>::getTuple(cgh, eval2), ExtractAccessor<Arg3>::getTuple(cgh, eval3)))) {
57 return utility::tuple::append(ExtractAccessor<Arg1>::getTuple(cgh, eval1),utility::tuple::append(ExtractAccessor<Arg2>::getTuple(cgh, eval2), ExtractAccessor<Arg3>::getTuple(cgh, eval3)));
|
| /external/ltp/testcases/misc/crash/ |
| crash02.c | 419 long int sysno, arg1, arg2, arg3, arg4, arg5, arg6, arg7; local
427 arg3 = rand_long();
437 try_num, sysno, arg1, arg2, arg3, arg4, arg5,
440 syscall(sysno, arg1, arg2, arg3, arg4, arg5, arg6, arg7);
|
| /frameworks/compile/slang/lit-tests/padding/ |
| more_structs.rs | 71 // CHECK-JAVA-INVOKE: public void invoke_check_five_struct(byte arg1, long arg2, short arg3, long arg4, short arg5) {
76 // CHECK-JAVA-INVOKE-NEXT: check_five_struct_fp.addI16(arg3);
116 void check_five_struct(char arg1, long arg2, short arg3, long arg4, half arg5) {
119 (g_five_struct.f3 != arg3) ||
|
| /external/valgrind/coregrind/m_syswrap/ |
| syswrap-x86-linux.c | 161 " movl 20+"FSZ"(%esp), %edx\n" /* syscall arg3: parent tid * */
830 PRINT("sys_clone ( %lx, %#lx, %#lx, %#lx, %#lx )",ARG1,ARG2,ARG3,ARG4,ARG5);
839 PRE_MEM_WRITE("clone(parent_tidptr)", ARG3, sizeof(Int));
840 if (!VG_(am_is_valid_for_client)(ARG3, sizeof(Int),
913 (Int *)ARG3, /* parent_tidptr */
926 (Int *)ARG3, /* parent_tidptr */
946 POST_MEM_WRITE(ARG3, sizeof(Int));
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/gen/ |
| ARMOps.go | 278 {name: "ADCshiftLLreg", argLength: 4, reg: gp3flags1, asm: "ADC"}, // arg0 + arg1<<arg2 + carry, arg3=flags
279 {name: "ADCshiftRLreg", argLength: 4, reg: gp3flags1, asm: "ADC"}, // arg0 + arg1>>arg2 + carry, unsigned shift, arg3=flags
280 {name: "ADCshiftRAreg", argLength: 4, reg: gp3flags1, asm: "ADC"}, // arg0 + arg1>>arg2 + carry, signed shift, arg3=flags
281 {name: "SBCshiftLLreg", argLength: 4, reg: gp3flags1, asm: "SBC"}, // arg0 - arg1<<arg2 - carry, arg3=flags
282 {name: "SBCshiftRLreg", argLength: 4, reg: gp3flags1, asm: "SBC"}, // arg0 - arg1>>arg2 - carry, unsigned shift, arg3=flags
283 {name: "SBCshiftRAreg", argLength: 4, reg: gp3flags1, asm: "SBC"}, // arg0 - arg1>>arg2 - carry, signed shift, arg3=flags
284 {name: "RSCshiftLLreg", argLength: 4, reg: gp3flags1, asm: "RSC"}, // arg1<<arg2 - arg0 - carry, arg3=flags
285 {name: "RSCshiftRLreg", argLength: 4, reg: gp3flags1, asm: "RSC"}, // arg1>>arg2 - arg0 - carry, unsigned shift, arg3=flags
286 {name: "RSCshiftRAreg", argLength: 4, reg: gp3flags1, asm: "RSC"}, // arg1>>arg2 - arg0 - carry, signed shift, arg3=flags
347 {name: "MOVWstoreidx", argLength: 4, reg: gp2store, asm: "MOVW"}, // store arg2 to arg0 + arg1. arg3=me
[all...] |
| /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/gen/ |
| ARMOps.go | 278 {name: "ADCshiftLLreg", argLength: 4, reg: gp3flags1, asm: "ADC"}, // arg0 + arg1<<arg2 + carry, arg3=flags
279 {name: "ADCshiftRLreg", argLength: 4, reg: gp3flags1, asm: "ADC"}, // arg0 + arg1>>arg2 + carry, unsigned shift, arg3=flags
280 {name: "ADCshiftRAreg", argLength: 4, reg: gp3flags1, asm: "ADC"}, // arg0 + arg1>>arg2 + carry, signed shift, arg3=flags
281 {name: "SBCshiftLLreg", argLength: 4, reg: gp3flags1, asm: "SBC"}, // arg0 - arg1<<arg2 - carry, arg3=flags
282 {name: "SBCshiftRLreg", argLength: 4, reg: gp3flags1, asm: "SBC"}, // arg0 - arg1>>arg2 - carry, unsigned shift, arg3=flags
283 {name: "SBCshiftRAreg", argLength: 4, reg: gp3flags1, asm: "SBC"}, // arg0 - arg1>>arg2 - carry, signed shift, arg3=flags
284 {name: "RSCshiftLLreg", argLength: 4, reg: gp3flags1, asm: "RSC"}, // arg1<<arg2 - arg0 - carry, arg3=flags
285 {name: "RSCshiftRLreg", argLength: 4, reg: gp3flags1, asm: "RSC"}, // arg1>>arg2 - arg0 - carry, unsigned shift, arg3=flags
286 {name: "RSCshiftRAreg", argLength: 4, reg: gp3flags1, asm: "RSC"}, // arg1>>arg2 - arg0 - carry, signed shift, arg3=flags
347 {name: "MOVWstoreidx", argLength: 4, reg: gp2store, asm: "MOVW"}, // store arg2 to arg0 + arg1. arg3=me
[all...] |
| /external/deqp/external/vulkancts/modules/vulkan/shaderexecutor/ |
| vktShaderBuiltinPrecisionTests.cpp | 1102 typedef P3 Arg3;
1107 typedef typename Traits<Arg3>::IVal IArg3;
1109 typedef Tuple4< const Arg0&, const Arg1&, const Arg2&, const Arg3&> Args;
1111 typedef Tuple4< ExprP<Arg0>, ExprP<Arg1>, ExprP<Arg2>, ExprP<Arg3> > ArgExprs;
[all...] |
| /external/deqp/modules/glshared/ |
| glsBuiltinPrecisionTests.cpp | 1123 typedef P3 Arg3;
1128 typedef typename Traits<Arg3>::IVal IArg3;
1130 typedef Tuple4< const Arg0&, const Arg1&, const Arg2&, const Arg3&> Args;
1132 typedef Tuple4< ExprP<Arg0>, ExprP<Arg1>, ExprP<Arg2>, ExprP<Arg3> > ArgExprs;
[all...] |
| /external/clang/lib/CodeGen/ |
| CGCUDABuiltin.cpp | 51 // printf("format string", arg1, arg2, arg3);
58 // Arg3 a3;
|
| /external/clang/test/CodeGenObjC/ |
| encode-test.m | 69 - (SEL**) meth : (SEL) arg : (SEL*****) arg1 : (SEL*)arg2 : (SEL**) arg3;
74 - (SEL**) meth : (SEL) arg : (SEL*****) arg1 : (SEL*)arg2 : (SEL**) arg3 {}
|
| /external/libjpeg-turbo/simd/ |
| jfdctfst-altivec.c | 27 * vec_madds(arg1, arg2, arg3) generates the 16-bit saturated sum of:
28 * the elements in arg3 + the most significant 17 bits of
|
