| /external/syslinux/gnu-efi/gnu-efi-3.0/inc/x86_64/ |
| efibind.h | 329 UINT64 arg8); 332 UINT64 arg8, UINT64 arg9); 335 UINT64 arg8, UINT64 arg9, UINT64 arg10);
|
| /external/protobuf/src/google/protobuf/stubs/ |
| substitute.h | 150 const internal::SubstituteArg& arg8 = internal::SubstituteArg(), 163 const internal::SubstituteArg& arg8 = internal::SubstituteArg(),
|
| /external/valgrind/coregrind/m_syswrap/ |
| syswrap-main.c | 64 NUM ARG1 ARG2 ARG3 ARG4 ARG5 ARG6 ARG7 ARG8 RESULT 83 NUM ARG1 ARG2 ARG3 ARG4 ARG5 ARG6 ARG7 ARG8 RESULT 422 && a1->arg8 == a2->arg8; 473 canonical->arg8 = 0; 485 canonical->arg8 = 0; 497 canonical->arg8 = 0; 509 canonical->arg8 = 0; 521 canonical->arg8 = 0; 533 canonical->arg8 = 0 [all...] |
| priv_types_n_macros.h | 63 UWord arg8; member in struct:SyscallArgs 321 #define ARG8 (arrghs->arg8) 331 #define SARG8 ((Word)ARG8)
|
| /external/protobuf/src/google/protobuf/ |
| arena.h | 414 typename Arg8> 419 const Arg7& arg7, const Arg8& arg8) { 421 return new T(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8); 425 arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8); [all...] |
| /prebuilts/tools/darwin-x86_64/protoc/include/google/protobuf/ |
| arena.h | 414 typename Arg8> 419 const Arg7& arg7, const Arg8& arg8) { 421 return new T(arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8); 425 arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8); [all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Universal/EbcDxe/Ia32/ |
| EbcSupport.c | 194 @param Arg8 The 8th argument.
218 IN UINTN Arg8,
300 *(UINTN *) (UINTN) (VmContext.Gpr[0]) = (UINTN) Arg8;
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| /device/linaro/bootloader/edk2/MdeModulePkg/Universal/EbcDxe/X64/ |
| EbcSupport.c | 139 @param Arg8 The 8th argument.
163 IN UINTN Arg8,
243 PushU64 (&VmContext, (UINT64) Arg8);
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| sgpr-copy.ll | 14 define amdgpu_ps void @phi1(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 { 38 define amdgpu_ps void @phi2(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 { 159 define amdgpu_ps void @loop(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 { 230 define amdgpu_ps void @sample_v3([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <8 x i32>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 { 294 define amdgpu_ps void @copy2([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <8 x i32>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 { 324 define amdgpu_ps void @sample_rsrc([6 x <16 x i8>] addrspace(2)* byval %arg, [17 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <4 x i32>] addrspace(2)* byval %arg2, [32 x <8 x i32>] addrspace(2)* byval %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, i32 %arg19, float %arg20, float %arg21) #0 {
|
| llvm.SI.load.dword.ll | 17 define amdgpu_vs void @main([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <32 x i8>] addrspace(2)* byval %arg2, [2 x <16 x i8>] addrspace(2)* byval %arg3, [17 x <16 x i8>] addrspace(2)* inreg %arg4, [17 x <16 x i8>] addrspace(2)* inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9) {
|
| schedule-kernel-arg-loads.ll | 31 i64 %arg8, i64 %arg9, i64 %arg10, i64 %arg11, i64 %arg12, i64 %arg13, i64 %arg14, i64 %arg15,
|
| si-lod-bias.ll | 9 define amdgpu_ps void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) {
|
| si-scheduler.ll | 19 define amdgpu_ps void @main([6 x <16 x i8>] addrspace(2)* byval %arg, [17 x <16 x i8>] addrspace(2)* byval %arg1, [17 x <4 x i32>] addrspace(2)* byval %arg2, [34 x <8 x i32>] addrspace(2)* byval %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, i32 %arg19, float %arg20, float %arg21) #0 {
|
| wait.ll | 14 define amdgpu_vs void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, <16 x i8> addrspace(2)* inreg %arg3, <16 x i8> addrspace(2)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float addrspace(2)* inreg %constptr) {
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Universal/EbcDxe/Ipf/ |
| EbcSupport.c | 103 UINT64 Arg8;
128 Arg8 = VA_ARG (List, UINT64);
162 // arg8 (Top of low stack)
201 PushU64 (&VmContext, Arg8);
|
| /external/libxml2/os400/libxmlrpg/ |
| xmlstring.rpgle | 126 d arg8 * value options(*string: *nopass)
|
| /external/google-breakpad/src/testing/include/gmock/ |
| gmock-generated-actions.h | [all...] |
| /external/googletest/googlemock/include/gmock/ |
| gmock-generated-actions.h | [all...] |
| /external/v8/testing/gmock/include/gmock/ |
| gmock-generated-actions.h | [all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Dxe/Include/Ipf/ |
| EsalRuntimeLib.h | 87 IN UINT64 Arg8
105 Arg8 - TODO: add argument description
|
| /device/linaro/bootloader/edk2/MdePkg/Include/Library/ |
| ExtendedSalLib.h | 61 @param Arg8 Argument 8 ClassGuid/FunctionId defined
81 IN UINT64 Arg8
|
| /external/pcre/dist2/ |
| RunTest | 195 arg8= 262 -8) arg8=yes;; 357 if [ "$arg8$arg16$arg32" = "" ] ; then 371 if [ "$arg8" = yes ] ; then
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/ |
| genrtl.h | 162 rtx arg8 MEM_STAT_DECL) 176 XEXP (rt, 8) = arg8; 880 #define gen_rtx_CALL_INSN(MODE, ARG0, ARG1, ARG2, ARG3, ARG4, ARG5, ARG6, ARG7, ARG8) \ 881 gen_rtx_fmt_iuuBeiiee (CALL_INSN, (MODE), (ARG0), (ARG1), (ARG2), (ARG3), (ARG4), (ARG5), (ARG6), (ARG7), (ARG8)) [all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/RuntimeDxe/EfiRuntimeLib/Ipf/ |
| RuntimeLib.c | 339 IN UINT64 Arg8
359 Arg8 - Argument 8 ClassGuid/FunctionId defined
395 Arg8
|
| /device/linaro/bootloader/edk2/MdePkg/Library/DxeExtendedSalLib/ |
| ExtendedSalLib.c | 231 @param Arg8 Argument 8 ClassGuid/FunctionId defined
252 IN UINT64 Arg8
295 Arg8
|