| /prebuilts/tools/common/m2/repository/com/facebook/fresco/imagepipeline/0.13.0/ |
| imagepipeline-0.13.0.aar | |
| /system/core/libpixelflinger/tests/arch-arm64/col32cb16blend/ |
| Android.mk | 6 ../../../arch-arm64/col32cb16blend.S
12 LOCAL_MODULE:= test-pixelflinger-arm64-col32cb16blend
|
| /system/core/libpixelflinger/tests/arch-arm64/t32cb16blend/ |
| Android.mk | 6 ../../../arch-arm64/t32cb16blend.S
12 LOCAL_MODULE:= test-pixelflinger-arm64-t32cb16blend
|
| /external/clang/test/CodeGenObjC/ |
| stret.m | 3 // RUN: %clang_cc1 -fblocks -triple arm64-apple-darwin %s -emit-llvm -o - | FileCheck %s -check-prefix=ARM64
5 // <rdar://problem/9757015>: Don't use 'stret' variants on ARM64.
13 // ARM64: @main
14 // ARM64-NOT: @objc_msgSend_stret
|
| /prebuilts/go/darwin-x86/src/cmd/asm/internal/arch/ |
| arm64.go | 5 // This file encapsulates some of the odd characteristics of the ARM64
13 "cmd/internal/obj/arm64"
17 "P": arm64.C_XPOST,
18 "W": arm64.C_XPRE,
56 case arm64.ACMN, arm64.ACMP, arm64.ATST,
57 arm64.ACMNW, arm64.ACMPW, arm64.ATSTW
[all...] |
| /prebuilts/go/linux-x86/src/cmd/asm/internal/arch/ |
| arm64.go | 5 // This file encapsulates some of the odd characteristics of the ARM64
13 "cmd/internal/obj/arm64"
17 "P": arm64.C_XPOST,
18 "W": arm64.C_XPRE,
56 case arm64.ACMN, arm64.ACMP, arm64.ATST,
57 arm64.ACMNW, arm64.ACMPW, arm64.ATSTW
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| cpus.ll | 4 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s
5 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a35 2>&1 | FileCheck %s
6 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s
7 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a57 2>&1 | FileCheck %s
8 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a72 2>&1 | FileCheck %s
9 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a73 2>&1 | FileCheck %s
10 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m1 2>&1 | FileCheck %s
11 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=kryo 2>&1 | FileCheck %s
12 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=vulcan 2>&1 | FileCheck %s
13 ; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALI
[all...] |
| simple-macho.ll | 1 ; RUN: llc -mtriple=arm64-macho -o - %s | FileCheck %s
2 ; RUN: llc -mtriple=arm64-macho -filetype=obj -o %t %s
3 ; RUN: llvm-objdump -triple=arm64-macho -d %t | FileCheck --check-prefix=CHECK-OBJ %s
|
| arm64-frame-index.ll | 1 ; RUN: llc -march=arm64 -mtriple=arm64-apple-ios -aarch64-atomic-cfg-tidy=0 < %s | FileCheck %s
|
| arm64-leaf.ll | 1 ; RUN: llc -march=arm64 -mtriple=arm64-apple-ios < %s | FileCheck %s
|
| arm64-subsections.ll | 1 ; RUN: llc -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefix=CHECK-MACHO
2 ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s --check-prefix=CHECK-ELF
|
| /external/valgrind/docs/internals/ |
| MERGE_3_10_1.txt | 44 //339858 arm64 dmb sy not implemented
56 //339853 arm64 times syscall unknown
63 //339855 arm64 unhandled getsid/setsid syscalls
74 //340036 arm64: Unhandled instruction ld4 (multiple structures, no offset)
78 //335440 arm64: ld1 (single structure) is not implemented
79 //2979 Complete arm64 load/store insns
82 //14653 Add test cases for all known arm64 load/store instructions.
85 //14667 Enable test cases for arm64 load/store insns
96 //339938 disInstr(arm64): unhandled instruction 0x4F8010A4 (fmla)
101 //340509 arm64: unhandled instruction fcvta
[all...] |
| /external/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| mismatched-intrinsics.ll | 3 target triple = "arm64-apple-ios5.0.0"
7 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v4i32
8 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v2i32
10 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
11 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
17 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
18 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-basic-a64-undefined.txt | 4 # RUN: echo "0x00 0x08 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
5 # RUN: echo "0x00 0x88 0x20 0xf8" | llvm-mc -triple arm64 -disassemble 2>&1 | FileCheck %s
9 # RUN: echo "0x00 0x10 0xa0 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
10 # RUN: echo "0x00 0x10 0x60 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
11 # RUN: echo "0x00 0x14 0x20 0x0b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
14 # RUN: echo "0x00 0x00 0xc0 0x72" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
17 # RUN: echo "0x00 0x00 0xc0 0xeb" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
18 # RUN: echo "0x00 0x80 0x80 0x6b" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
21 # RUN: echo "0x00 0x80 0x00 0x53" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %s
24 # RUN: echo "0x00 0x40 0x00 0x2e" | llvm-mc -triple=arm64 -disassemble 2>&1 | FileCheck %
[all...] |
| /art/test/572-checker-array-get-regression/ |
| info.txt | 1 Regression test for the ARM64 Baker's read barrier fast path compiler
|
| /art/test/635-checker-arm64-volatile-load-cc/ |
| info.txt | 1 Regression test checking that the VIXL ARM64 scratch register pool is
|
| /art/test/646-checker-arraycopy-large-cst-pos/ |
| info.txt | 3 constant destination position, on ARM64, with read barriers
|
| /build/make/target/board/generic_arm64/ |
| README.txt | 1 The "generic_arm64" product defines a non-hardware-specific arm64 target
|
| /external/clang/test/Driver/ |
| arm64-darwinpcs.c | 1 // RUN: %clang -target arm64-apple-ios7.0 -### %s 2>&1 | FileCheck %s
|
| /external/llvm/test/Transforms/CodeGenPrepare/AArch64/ |
| widen_switch.ll | 3 ; RUN: opt < %s -codegenprepare -S -mtriple=aarch64-unknown-unknown | FileCheck %s --check-prefix=ARM64
28 ; ARM64-LABEL: @widen_switch_i16(
29 ; ARM64: %0 = zext i16 %trunc to i32
30 ; ARM64-NEXT: switch i32 %0, label %sw.default [
31 ; ARM64-NEXT: i32 1, label %return
32 ; ARM64-NEXT: i32 65535, label %sw.bb1
58 ; ARM64-LABEL: @widen_switch_i17(
59 ; ARM64: %0 = zext i17 %trunc to i32
60 ; ARM64-NEXT: switch i32 %0, label %sw.default [
61 ; ARM64-NEXT: i32 10, label %retur
[all...] |
| /external/rmi4utils/ |
| Application.mk | 4 APP_ABI := armeabi armeabi-v7a arm64-v8
|
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/arm64/ |
| galign.go | 5 package arm64 package
10 "cmd/internal/obj/arm64"
14 gc.Thearch.LinkArch = &arm64.Linkarm64
15 gc.Thearch.REGSP = arm64.REGSP
|
| /prebuilts/go/linux-x86/src/cmd/compile/internal/arm64/ |
| galign.go | 5 package arm64 package
10 "cmd/internal/obj/arm64"
14 gc.Thearch.LinkArch = &arm64.Linkarm64
15 gc.Thearch.REGSP = arm64.REGSP
|
| /development/vndk/tools/header-checker/tests/input/ |
| test_version_script.map | 5 _ZN5test35BeginET_T0_i; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
6 _ZN5Stack4pushET_; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
|
| /external/clang/test/CodeGen/ |
| arm64_vcreate.c | 1 // RUN: %clang_cc1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -S -o - -emit-llvm %s | opt -S -mem2reg | FileCheck %s
2 // Test ARM64 SIMD vcreate intrinsics
|
