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  /external/llvm/lib/Analysis/
ProfileSummaryInfo.cpp 54 // any backend passes (IR level instrumentation, for example). This method
  /external/llvm/lib/CodeGen/
BuiltinGCs.cpp 49 /// includes the C backend). Note that the code generated is not quite as
  /external/llvm/lib/Support/
TargetRegistry.cpp 30 // name, because it might be a backend that has no mapping to a target triple.
  /external/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64MCTargetDesc.cpp 156 // Register the asm backend.
  /external/llvm/lib/Target/AMDGPU/MCTargetDesc/
AMDGPUAsmBackend.cpp 1 //===-- AMDGPUAsmBackend.cpp - AMDGPU Assembler Backend -------------------===//
  /external/llvm/lib/Target/AMDGPU/
SITypeRewriter.cpp 17 /// in the backend, because we want the legalizer to expand all v16i8
  /external/llvm/lib/Target/Lanai/MCTargetDesc/
LanaiAsmBackend.cpp 1 //===-- LanaiAsmBackend.cpp - Lanai Assembler Backend ---------------------===//
LanaiMCTargetDesc.cpp 132 // Register the ASM Backend
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsMCTargetDesc.cpp 192 // Register the asm backend.
  /external/llvm/lib/Target/Sparc/MCTargetDesc/
SparcMCTargetDesc.cpp 148 // Register the asm backend.
  /external/llvm/lib/Target/SystemZ/
SystemZ.h 11 // the LLVM SystemZ backend.
  /external/llvm/lib/Target/X86/MCTargetDesc/
X86MCAsmInfo.cpp 32 cl::desc("Choose style of code to emit from X86 backend:"),
  /external/llvm/test/CodeGen/AArch64/
aarch64-neon-v1i1-setcc.ll 5 ; is illegal in AArch64 backend, the legalizer tries to scalarize this node.
  /external/llvm/test/CodeGen/AMDGPU/
si-scheduler.ll 4 ; is to specify -mattr=si-scheduler. If we just pass --misched=si, the backend
  /external/llvm/test/CodeGen/ARM/
vselect_imax.ll 3 ; Make sure that ARM backend with NEON handles vselect.
  /external/llvm/test/CodeGen/X86/
lower-vec-shift.ll 8 ; packed shift right by a constant build_vector the backend should always try to
  /external/llvm/test/Linker/Inputs/
type-unique-simple2-a.ll 1 ; Make sure the backend generates a single DIE and uses ref_addr.
  /external/llvm/test/Linker/
type-unique-simple-a.ll 8 ; Make sure the backend generates a single DIE and uses ref_addr.
  /external/llvm/test/TableGen/
TargetInstrInfo.td 99 // TargetInstrInfo tablegen backend.
  /external/llvm/test/Transforms/InstCombine/
narrow-switch.ll 7 ; and allow the backend to expand as much as needed to ensure optimal codegen for any target.
  /external/llvm/test/Transforms/SLPVectorizer/ARM/
sroa.ll 9 ; backend and disappear, the vectorized code stays.
  /external/ltp/lib/
tst_tmpdir.c 200 * Unmap the backend file.
  /external/mesa3d/src/gallium/auxiliary/draw/
draw_context.h 258 * Driver backend interface
draw_pt.h 82 * hardware backend.
  /external/mesa3d/src/gallium/drivers/r600/
r600_asm.h 142 * r600_bytecode::isa. This is used by the LLVM backend to emit CF instructions

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