| /art/compiler/utils/arm/ |
| assembler_arm.h | 499 virtual void bics(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) { function in class:art::arm::ArmAssembler
[all...] |
| /art/compiler/utils/ |
| assembler_thumb_test.cc | 268 __ bics(R0, R0, ShifterOperand(R1));
300 __ bics(R0, R0, ShifterOperand(R8));
324 __ bics(R0, R0, ShifterOperand(R1), arm::EQ);
[all...] |
| /external/llvm/test/MC/ARM/ |
| basic-thumb-instructions.s | 160 @ BICS
162 bics r1, r6
164 @ CHECK: bics r1, r6 @ encoding: [0xb1,0x43]
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-thumb-instructions.s | 139 @ BICS
141 bics r1, r6
143 @ CHECK: bics r1, r6 @ encoding: [0xb1,0x43]
|
| /external/vixl/test/aarch64/ |
| test-disasm-aarch64.cc | [all...] |
| test-assembler-aarch64.cc | 959 TEST(bics) {
964 __ Bics(w0, w1, Operand(w1));
974 __ Bics(w0, w0, Operand(w0, LSR, 1));
985 __ Bics(x0, x0, Operand(x1, ROR, 1));
995 __ Bics(x0, x0, 0x7fffffffffffffff);
1005 __ Bics(w0, w0, 0xfffffff0);
[all...] |
| test-trace-aarch64.cc | 75 __ bics(w3, w4, w5);
76 __ bics(x6, x7, x8);
[all...] |
| /external/vixl/src/aarch32/ |
| macro-assembler-aarch32.h | [all...] |
| assembler-aarch32.cc | 3109 void Assembler::bics(Condition cond, function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | 550 void bics(Condition cond,
[all...] |
| disasm-aarch32.cc | 1302 void Disassembler::bics(Condition cond, function in class:vixl::aarch32::Disassembler
[all...] |
| /external/v8/src/arm64/ |
| disasm-arm64.cc | 301 case BICS_x: mnemonic = "bics"; break;
[all...] |
| assembler-arm64.cc | 1209 void Assembler::bics(const Register& rd, function in class:v8::internal::Assembler
[all...] |
| macro-assembler-arm64.cc | 97 case BICS:
115 case BICS:
[all...] |
| assembler-arm64.h | [all...] |
| macro-assembler-arm64.h | 183 inline void Bics(const Register& rd,
[all...] |
| /external/vixl/doc/aarch64/ |
| supported-instructions-aarch64.md | 175 ### BICS ###
179 void bics(const Register& rd,
[all...] |
| /external/vixl/src/aarch64/ |
| assembler-aarch64.cc | 519 void Assembler::bics(const Register& rd, function in class:vixl::aarch64::Assembler
522 Logical(rd, rn, operand, BICS);
[all...] |
| assembler-aarch64.h | 656 void bics(const Register& rd, const Register& rn, const Operand& operand);
[all...] |
| macro-assembler-aarch64.h | 617 void Bics(const Register& rd, const Register& rn, const Operand& operand);
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-rn-operand-rm-shift-rs-a32.cc | 59 M(bics) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc | 125 M(Bics) \
[all...] |
| /external/llvm/test/MC/AArch64/ |
| basic-a64-instructions.s | [all...] |
| basic-a64-diagnostics.s | [all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| basic-a64-instructions.txt | [all...] |
