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  /device/linaro/bootloader/OpenPlatformPkg/Drivers/Usb/DwUsbDxe/
DwUsbDxe.h 44 #define DW_DC_INTERRUPT_SOF BIT1
84 #define DW_CTRL_FUNCTION_STATUS BIT1
100 #define DW_OTG_CTRL_DP_PULLDOWN BIT1
105 #define DW_OTG_STATUS_A_B_SESS_VLD BIT1
  /device/linaro/bootloader/edk2/ArmPkg/Include/Chipset/
AArch64.h 96 #define CNTHCTL_EL2_EL1PCEN BIT1
  /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/
ArmVExpressSysConfig.c 36 #define SYS_CFGSTAT_ERROR BIT1
  /device/linaro/bootloader/edk2/Nt32Pkg/Library/PlatformBootManagerLib/
PlatformBootManager.h 57 #define CONSOLE_IN BIT1
  /device/linaro/bootloader/edk2/Omap35xxPkg/Include/Omap3530/
Omap3530Dma.h 110 #define DMA4_CSR_DROP BIT1
  /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/
hte.c 274 Returns byte lane failure on each bit (for Quark only bit0 and bit1)
347 Returns byte lane failure on each bit (for Quark only bit0 and bit1)
417 Returns byte lane failure on each bit (for Quark only bit0 and bit1)
457 Returns byte lane failure on each bit (for Quark only bit0 and bit1)
  /device/linaro/bootloader/edk2/SecurityPkg/Include/Library/
Tcg2PhysicalPresenceLib.h 27 #define TCG2_BIOS_TPM_MANAGEMENT_FLAG_PP_REQUIRED_FOR_CLEAR BIT1
TpmCommLib.h 157 #define TIS_PC_ACC_RQUUSE BIT1
183 #define TIS_PC_STS_RETRY BIT1
  /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/
ArchDebugSupport.c 43 if (((PcdGet32 (PcdExceptionsIgnoredByDebugger) & ~(BIT1 | BIT3)) & (1 << Index)) != 0) {
  /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/
RTD3.asl 48 CreateDWordField(Arg3,0,CDW1) //bit1,2 is always clear
  /external/libhevc/common/
ihevc_cabac_tables.h 120 * input : curpState[bits7-2] | curMPS[bit1] | decodedBin[bit0]
  /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/
Acpi60.h 197 #define EFI_ACPI_6_0_8042 BIT1
208 #define EFI_ACPI_6_0_ARM_PSCI_USE_HVC BIT1
215 #define EFI_ACPI_6_0_WBINVD_FLUSH BIT1
264 #define EFI_ACPI_6_0_64BIT_WAKE_SUPPORTED_F BIT1
523 #define EFI_ACPI_6_0_PERFORMANCE_INTERRUPT_MODEL BIT1
    [all...]
Acpi20.h 205 #define EFI_ACPI_2_0_8042 BIT1
212 #define EFI_ACPI_2_0_WBINVD_FLUSH BIT1
Acpi50.h 314 #define EFI_ACPI_5_0_8042 BIT1
325 #define EFI_ACPI_5_0_WBINVD_FLUSH BIT1
374 #define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1
623 #define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1
    [all...]
  /device/linaro/bootloader/edk2/ArmVirtPkg/Library/QemuFwCfgLib/
QemuFwCfgLib.c 68 #define FW_CFG_DMA_CTL_READ BIT1
136 if ((Features & BIT1) != 0) {
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Guid/
BoardFeatures.h 48 #define B_BOARD_FEATURES_LAN_MARVELL BIT1
142 #define B_BOARD_FEATURES_CHIPSET_VIDEO BIT1
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGens/
BoardClkGens.h 68 #define CK410_GENERATOR_CLOCK_FREERUN_BIT (BIT0 | BIT1 | BIT2)
76 #define CK505_GENERATOR_SPREAD_SPECTRUM_BIT (BIT0 | BIT1)
  /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/
IsaFloppy.h 227 #define MSR_DBB BIT1
255 #define CCR_DRC (BIT0 | BIT1)
361 #define STS0_US1 BIT1
402 #define STS1_NW BIT1
428 #define STS2_BC BIT1
453 #define STS3_US1 BIT1
  /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/
Serial.h 162 // Theie Bit1: Transmistter Holding Register Empty Interrupt Enable
194 // ResetRF Bit1: Reset Reciever FIFO
227 // SerialDB Bit0-Bit1: Number of Serial Data Bits
264 // Rts Bit1: Request To Send Control
298 // Oe Bit1: Overrun Error Status
336 // DeltaDSR Bit1: Delta Data Set Ready Status
  /device/linaro/bootloader/edk2/MdeModulePkg/Library/BaseSerialPortLib16550/
BaseSerialPortLib16550.c 44 #define B_UART_MCR_RTS BIT1
368 if ((PciRead16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister) & (BIT0 | BIT1)) != 0x00) {
369 PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1));
404 if ((PciRead16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister) & (BIT0 | BIT1)) != 0x00) {
405 PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1));
    [all...]
  /device/linaro/bootloader/edk2/MdePkg/
MdePkg.uni 179 "BIT1 - Enable Debug Print.<BR>\n"
191 "BIT1 - Warning message.<BR>\n"
214 "BIT1 - Warning message.<BR>\n"
237 "BIT1 - Enable Error Code.<BR>\n"
253 "BIT1 - Enable Post Code with Description.<BR>"
    [all...]
  /external/guava/guava-tests/test/com/google/common/hash/
HashTestUtils.java 379 for (int bit1 = 0; bit1 < keyBits; bit1++) {
381 if (bit2 <= bit1) continue;
382 int delta = (1 << bit1) | (1 << bit2);
  /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/
Ioh.h 20 #define BIT1 0x02
135 #define B_IOH_USB_COMMAND_MSE BIT1
204 #define B_IOH_MAC_COMMAND_MSE BIT1
  /external/syslinux/gpxe/src/drivers/net/
p80211hdr.h 171 #define WLAN_GET_FC_PVER(n) (((UINT16)(n)) & (BIT0 | BIT1))
206 #define WLAN_GET_SEQ_FRGNUM(n) (((UINT16)(n)) & (BIT0|BIT1|BIT2|BIT3))
207 #define WLAN_GET_SEQ_SEQNUM(n) ((((UINT16)(n)) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4)
  /device/linaro/bootloader/edk2/ArmPkg/
ArmPkg.dec 147 # - BIT1 : IRQ Handler
187 # - BIT1 : IRQ Handler

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