HomeSort by relevance Sort by last modified time
    Searched full:bit4 (Results 51 - 75 of 195) sorted by null

1 23 4 5 6 7 8

  /device/linaro/bootloader/edk2/SecurityPkg/Include/Library/
TpmCommLib.h 143 #define TIS_PC_ACC_SEIZED BIT4
175 #define TIS_PC_STS_DATA BIT4
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Guid/
BoardFeatures.h 51 #define B_BOARD_FEATURES_SIO_COM2 BIT4
145 #define B_BOARD_FEATURES_SIO_NO_COM1 BIT4
  /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/
IsaFloppy.h 209 #define DRVA_MOTOR_ON BIT4
232 #define MSR_CB BIT4
343 #define STS0_EC BIT4
389 #define STS1_OR BIT4
423 #define STS2_WC BIT4
443 #define STS3_T0 BIT4
  /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/
Serial.h 165 // Reserved Bit4-Bit7: Reserved
197 // Reserved Bit4-Bit5: Reserved
230 // EvenPar Bit4: Even Parity Select
267 // Lme; Bit4: Loopback Mode Enable
301 // Bi Bit4: Break Interrupt Status
339 // Cts Bit4: Clear To Send Status
  /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/
QuarkNcSocId.h 289 #define B_TSCGF1_CONFIG_ISNSCURRENTSEL_MASK (BIT5 | BIT4 | BIT3)
333 #define B_CFG_STICKY_RW_WARM_RST BIT4
387 #define B_QNC_SMBUS_START (BIT4) // Start/Stop
495 #define B_QNC_GPE0BLK_SMIE_APM (BIT4) // APM
509 #define B_QNC_GPE0BLK_SMIS_APM (BIT4) // APM
    [all...]
  /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/
SDController.c 208 if (ErrorCode & BIT4) {
621 Data |= BIT4 | BIT0;
623 Data &= ~BIT4;
626 Data &= ~(BIT4 | BIT0);
669 Data = (CommandIndex << 8) | BIT1 | BIT4| BIT3;
675 Data = (CommandIndex << 8) | BIT0 | BIT1 | BIT4| BIT3;
    [all...]
  /device/linaro/bootloader/OpenPlatformPkg/Drivers/Usb/DwUsbDxe/
DwUsbDxe.h 47 #define DW_DC_INTERRUPT_RESUME BIT4
65 #define DW_MODE_SFRESET BIT4
71 #define DW_ENDPOINT_TYPE_NOEMPKT BIT4
  /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
XhciReg.h 150 #define XHC_USBSTS_PCD BIT4 // Port Change Detect
169 #define XHC_PORTSC_RESET BIT4 // Port Reset
186 #define XHC_HUB_PORTSC_RESET BIT4 // Hub's Port Reset
  /external/syslinux/gpxe/src/include/gpxe/efi/IndustryStandard/
Pci22.h 385 #define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE BIT4 ///< 0x0010
399 #define EFI_PCI_BRIDGE_CONTROL_VGA_16 BIT4 ///< 0x0010
419 #define EFI_PCI_STATUS_CAPABILITY BIT4 ///< 0x0010
  /device/linaro/bootloader/edk2/ArmPkg/
ArmPkg.dec 150 # - BIT4 : FW - F bit writable
190 # - BIT4 : FW - F bit writable
  /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/
AhciMode.h 102 #define EFI_AHCI_PORT_IS_UFS BIT4
126 #define EFI_AHCI_PORT_CMD_FRE BIT4
  /device/linaro/bootloader/edk2/MdeModulePkg/Include/Protocol/
DisplayProtocol.h 151 #define HII_DISPLAY_SUPPRESS BIT4
FormBrowserEx.h 41 #define BROWSER_ACTION_EXIT BIT4
  /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/
MrcWrapper.h 98 #define PDAT_MRC_FLAG_WR_ODT_EN BIT4 ///< If set ODR signal is asserted to DRAM devices on writes.
  /device/linaro/bootloader/edk2/SecurityPkg/Tcg/Tcg2Smm/
Tpm.asl 92 // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.
  /device/linaro/bootloader/edk2/SecurityPkg/Tcg/TcgSmm/
Tpm.asl 92 // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.
  /device/linaro/bootloader/edk2/SecurityPkg/Tcg/TrEESmm/
Tpm.asl 91 // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.
  /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/
PchRegs.h 50 #define BIT4 0x0010
  /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/Protocol/
HwWatchdogTimer.h 40 #define B_INSTAFLUSH BIT4
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/
UartInit.c 43 #define V_PCH_ILB_IRQE_UARTIRQEN_IRQ4 BIT4 // UART IRQ4 Enable
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Protocol/
HwWatchdogTimer.h 49 #define B_INSTAFLUSH BIT4
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/VlvPlatformInitDxe/
IgdOpRegion.h 75 #define HD_MBOX5 BIT4
  /external/kernel-headers/original/uapi/linux/
synclink.h 22 #define BIT4 0x0010
  /frameworks/av/media/libstagefright/codecs/amrwbenc/src/
syn_filt.c 154 /* sig_lo = bit4 to bit15 of synthesis */
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/linux/
synclink.h 22 #define BIT4 0x0010

Completed in 575 milliseconds

1 23 4 5 6 7 8