| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/linux/ |
| synclink.h | 22 #define BIT4 0x0010
|
| /system/bt/embdrv/sbc/decoder/srce/ |
| decoder-private.c | 105 frame->blocks = (d1 & (BIT5 | BIT4)) >> 4;
|
| /toolchain/binutils/binutils-2.25/cpu/ |
| xc16x.cpu | 177 (dnf f-op-bit4 "gap of 4 bits" () 11 4) ;used for filling with const data
572 (dnop bit4 "gap of 4 bits" () h-uint f-op-bit4)
[all...] |
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/ |
| meminit_utils.c | 172 msk = (BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0);
237 msk = (byte_lane & BIT0) ? (BIT19 | BIT18 | BIT17 | BIT16) : (BIT7 | BIT6 | BIT5 | BIT4);
261 msk |= (byte_lane & BIT0) ? (BIT4) : (BIT1);
473 | (BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8) | (BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0);
710 msk |= (BIT5 | BIT4); // only ??? matters
787 (vref_codes[setting] << 2), (BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2));
788 //isbM32m(DDRPHY, (reg + (channel * DDRIODQ_CH_OFFSET) + ((byte_lane >> 1) * DDRIODQ_BL_OFFSET)), (setting<<2), (BIT7|BIT6|BIT5|BIT4|BIT3|BIT2));
[all...] |
| /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/ |
| Acpi30.h | 234 #define EFI_ACPI_3_0_PCIE_ASPM_CONTROLS BIT4
244 #define EFI_ACPI_3_0_PWR_BUTTON BIT4
|
| Acpi20.h | 215 #define EFI_ACPI_2_0_PWR_BUTTON BIT4
|
| Pci22.h | 585 #define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE BIT4 ///< 0x0010
599 #define EFI_PCI_BRIDGE_CONTROL_VGA_16 BIT4 ///< 0x0010
619 #define EFI_PCI_STATUS_CAPABILITY BIT4 ///< 0x0010
|
| /device/linaro/bootloader/edk2/SecurityPkg/Library/Tpm12DeviceLibDTpm/ |
| Tpm12Tis.c | 135 #define TIS_PC_ACC_SEIZED BIT4
167 #define TIS_PC_STS_DATA BIT4
|
| /device/linaro/bootloader/edk2/SecurityPkg/Library/Tpm2DeviceLibDTpm/ |
| Tpm2Tis.c | 139 #define TIS_PC_ACC_SEIZED BIT4
171 #define TIS_PC_STS_DATA BIT4
|
| /device/linaro/bootloader/edk2/ShellPkg/Include/Library/ |
| HandleParsingLib.h | 146 #define HR_BUS_DRIVER BIT4 // a bus driver (hybrid?)
154 #define HR_VALID_MASK (BIT1|BIT2|BIT3|BIT4|BIT5|BIT6|BIT7|BIT8|BIT9|BIT10|BIT11)
|
| /device/linaro/bootloader/edk2/BaseTools/Source/C/Include/Common/ |
| BaseTypes.h | 225 #define BIT4 0x00000010
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BasePrintLib/ |
| PrintLibInternal.h | 29 #define LONG_TYPE BIT4
|
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/ |
| QNCCommonDefinitions.h | 74 #define BIT4 0x0010
|
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Include/ |
| IohCommonDefinitions.h | 74 #define BIT4 0x0010
|
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/ |
| VlvCommonDefinitions.h | 81 #define BIT4 0x0010
|
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/MonoStatusCode/ |
| PlatformStatusCode.c | 312 #define V_PCH_ILB_IRQE_UARTIRQEN_IRQ4 BIT4 // UART IRQ4 Enable
|
| /external/libmojo/mojo/public/tools/bindings/pylib/mojom/generate/ |
| pack_tests.py | 150 struct.AddField('bit4', mojom.BOOL)
|
| /device/linaro/bootloader/edk2/MdePkg/ |
| MdePkg.uni | 182 "BIT4 - Enable BreakPoint as ASSERT.<BR>\n"
194 "BIT4 - Allocate or Free Pool message.<BR>\n"
217 "BIT4 - Allocate or Free Pool message.<BR>\n"
[all...] |
| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/ |
| PlatformEarlyInit.c | 625 RegData32 &= ~(BIT5 | BIT4 | BIT3);
[all...] |
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformPei/ |
| Platform.c | 797 DEBUG((EFI_D_INFO , "GGC: 0x%08x GMSsize:0x%08x\n", GGC, (GGC & (BIT7|BIT6|BIT5|BIT4|BIT3))>>3));
804 DEBUG((EFI_D_INFO , "GGC: 0x%08x GMSsize:0x%08x\n", GGC, (GGC & (BIT7|BIT6|BIT5|BIT4|BIT3))>>3));
1126 do { StsReg = (UINT8) IoRead8(SmbusBase+0); } while ((StsReg & (BIT4|BIT3|BIT2|BIT1)) == 0);
[all...] |
| /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/ |
| IsaFloppyCtrl.c | 1108 // bit4: Command busy
1111 // set mask: for drive A set bit0 & bit4; for drive B set bit1 & bit4
[all...] |
| /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyPei/ |
| FloppyPeim.c | 517 // bit4: Command busy
519 // set mask: for drive A set bit0 & bit4; for drive B set bit1 & bit4
[all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/UhciPei/ |
| UhcPeim.h | 47 #define USBCMD_FGR BIT4 /* Force Global Resume */
58 #define USBSTS_HCPE BIT4 /* Host Controller Process Error - the scripts were buggy */
85 #define USBPORTSC_LSL BIT4 /* Line Status Low bit*/
[all...] |
| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb/ |
| DebugCommunicationLibUsb.c | 291 MmioAnd32((UINTN)&DebugPortRegister->ControlStatus, (UINT32)~BIT4);
393 MmioOr32((UINTN)&DebugPortRegister->ControlStatus, BIT4);
972 MmioAnd32((UINTN)&UsbDebugPortRegister->ControlStatus, (UINT32)~BIT4);
[all...] |
| /bionic/libc/kernel/uapi/linux/ |
| synclink.h | 29 #define BIT4 0x0010
|
