/external/e2fsprogs/misc/ |
e2freefrag.h | 13 int chunkbits; /* chunk size in bits */ 16 int blocksize_bits; /* fs blocksize in bits */
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/external/iptables/extensions/ |
libipt_NETMAP.c | 36 int bits; local 39 for (bits = 0, bm = 0x80000000; netmask & bm; netmask <<= 1) 40 bits++; 43 return bits; 71 int bits; local 76 bits = netmask2bits(a.s_addr); 77 if (bits < 0) 80 printf("/%d", bits);
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libxt_NETMAP.man | 8 following way: All 'one' bits in the mask are filled in from the new `address'. 9 All bits that are zero in the mask are filled in from the original address.
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/external/kernel-headers/original/uapi/asm-generic/ |
ioctl.h | 4 /* ioctl command encoding: 32 bits total, command in lower 16 bits, 5 * size of the parameter structure in the lower 14 bits of the 6 * upper 16 bits. 10 * The highest 2 bits are reserved for indicating the ``access mode''. 17 * a type field. De facto, however, the top 8 bits of the lower 16 18 * bits are indeed used as a type field, so we might just as well make 49 * Direction bits, which any architecture can choose to override
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/external/llvm/test/CodeGen/ARM/ |
crc32.ll | 6 %bits = zext i8 %next to i32 7 %val = call i32 @llvm.arm.crc32b(i32 %cur, i32 %bits) 14 %bits = zext i16 %next to i32 15 %val = call i32 @llvm.arm.crc32h(i32 %cur, i32 %bits) 29 %bits = zext i8 %next to i32 30 %val = call i32 @llvm.arm.crc32cb(i32 %cur, i32 %bits) 37 %bits = zext i16 %next to i32 38 %val = call i32 @llvm.arm.crc32ch(i32 %cur, i32 %bits)
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/external/squashfs-tools/squashfs-tools/ |
swap.c | 100 #define SWAP_LE_NUM(BITS) \ 101 void swap_le##BITS##_num(void *s, void *d, int n) \ 104 for(i = 0; i < n; i++, s += BITS / 8, d += BITS / 8)\ 105 swap_le##BITS(s, d);\ 112 #define INSWAP_LE_NUM(BITS, TYPE) \ 113 void inswap_le##BITS##_num(TYPE *s, int n) \ 117 s[i] = inswap_le##BITS(s[i]);\
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/external/valgrind/memcheck/tests/ |
clo_redzone.c | 16 // on 32 bits and 64 bits.
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/asm/ |
debugreg.h | 14 which debugging register was responsible for the trap. The other bits 27 bits - each field corresponds to one of the four debug registers, 31 #define DR_CONTROL_SHIFT 16 /* Skip this many bits in ctl register */ 32 #define DR_CONTROL_SIZE 4 /* 4 control bits per register */ 44 enabled. There are 4 fields of two bits. One bit is "local", meaning 52 #define DR_ENABLE_SIZE 2 /* 2 enable bits per register */ 54 #define DR_LOCAL_ENABLE_MASK (0x55) /* Set local bits for all 4 regs */ 55 #define DR_GLOBAL_ENABLE_MASK (0xAA) /* Set global bits for all 4 regs */
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/asm-generic/ |
ioctl.h | 4 /* ioctl command encoding: 32 bits total, command in lower 16 bits, 5 * size of the parameter structure in the lower 14 bits of the 6 * upper 16 bits. 10 * The highest 2 bits are reserved for indicating the ``access mode''. 17 * a type field. De facto, however, the top 8 bits of the lower 16 18 * bits are indeed used as a type field, so we might just as well make 49 * Direction bits, which any architecture can choose to override
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/x86_64-linux/include/c++/4.8/ |
vector | 60 #include <bits/stl_algobase.h> 61 #include <bits/allocator.h> 62 #include <bits/stl_construct.h> 63 #include <bits/stl_uninitialized.h> 64 #include <bits/stl_vector.h> 65 #include <bits/stl_bvector.h> 66 #include <bits/range_access.h> 69 # include <bits/vector.tcc>
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/sysroot/usr/include/asm-generic/ |
ioctl.h | 4 /* ioctl command encoding: 32 bits total, command in lower 16 bits, 5 * size of the parameter structure in the lower 14 bits of the 6 * upper 16 bits. 10 * The highest 2 bits are reserved for indicating the ``access mode''. 17 * a type field. De facto, however, the top 8 bits of the lower 16 18 * bits are indeed used as a type field, so we might just as well make 49 * Direction bits, which any architecture can choose to override
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/x86_64-linux/include/c++/4.8/ |
vector | 60 #include <bits/stl_algobase.h> 61 #include <bits/allocator.h> 62 #include <bits/stl_construct.h> 63 #include <bits/stl_uninitialized.h> 64 #include <bits/stl_vector.h> 65 #include <bits/stl_bvector.h> 66 #include <bits/range_access.h> 69 # include <bits/vector.tcc>
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/prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/c++/4.8.3/ |
vector | 60 #include <bits/stl_algobase.h> 61 #include <bits/allocator.h> 62 #include <bits/stl_construct.h> 63 #include <bits/stl_uninitialized.h> 64 #include <bits/stl_vector.h> 65 #include <bits/stl_bvector.h> 66 #include <bits/range_access.h> 69 # include <bits/vector.tcc>
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/prebuilts/go/darwin-x86/src/runtime/ |
mmap.go | 16 // We only pass the lower 32 bits of file offset to the 17 // assembly routine; the higher bits (if required), should be provided
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/prebuilts/go/linux-x86/src/runtime/ |
mmap.go | 16 // We only pass the lower 32 bits of file offset to the 17 // assembly routine; the higher bits (if required), should be provided
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/prebuilts/ndk/r10/sources/cxx-stl/gnu-libstdc++/4.9/include/ |
vector | 60 #include <bits/stl_algobase.h> 61 #include <bits/allocator.h> 62 #include <bits/stl_construct.h> 63 #include <bits/stl_uninitialized.h> 64 #include <bits/stl_vector.h> 65 #include <bits/stl_bvector.h> 66 #include <bits/range_access.h> 69 # include <bits/vector.tcc>
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/prebuilts/ndk/r11/sources/cxx-stl/gnu-libstdc++/4.9/include/ |
vector | 60 #include <bits/stl_algobase.h> 61 #include <bits/allocator.h> 62 #include <bits/stl_construct.h> 63 #include <bits/stl_uninitialized.h> 64 #include <bits/stl_vector.h> 65 #include <bits/stl_bvector.h> 66 #include <bits/range_access.h> 69 # include <bits/vector.tcc>
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/prebuilts/ndk/r13/sources/cxx-stl/gnu-libstdc++/4.9/include/ |
vector | 60 #include <bits/stl_algobase.h> 61 #include <bits/allocator.h> 62 #include <bits/stl_construct.h> 63 #include <bits/stl_uninitialized.h> 64 #include <bits/stl_vector.h> 65 #include <bits/stl_bvector.h> 66 #include <bits/range_access.h> 69 # include <bits/vector.tcc>
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/nds32/ |
to-16bit-v3.d | 5 # Test the convert 32bits to 16bits
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic54x/ |
extaddr.s | 8 ldx #F1,16,a ; load upper 8 bits of extended address 9 or #F1,a,a ; load remaining bits
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/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Modules/zlib/ |
infback.c | 83 unsigned sym, bits;
local 94 bits = 9;
95 inflate_table(LENS, state->lens, 288, &(next), &(bits), state->work);
101 bits = 5;
102 inflate_table(DISTS, state->lens, 32, &(next), &(bits), state->work);
126 bits = state->bits; \
137 state->bits = bits; \
144 bits = 0; \ 253 unsigned bits; \/* bits in bit buffer *\/ local [all...] |
/device/linaro/bootloader/edk2/UefiCpuPkg/Library/BaseXApicX2ApicLib/ |
BaseXApicX2ApicLib.c | 83 return (UINTN)(LShiftU64 ((UINT64) ApicBaseMsr.Bits.ApicBaseHigh, 32)) +
84 (((UINTN)ApicBaseMsr.Bits.ApicBaseLow) << 12);
114 ApicBaseMsr.Bits.ApicBaseLow = (UINT32) (BaseAddress >> 12);
115 ApicBaseMsr.Bits.ApicBaseHigh = (UINT32) (RShiftU64((UINT64) BaseAddress, 32));
244 // Save existing contents of ICR high 32 bits
254 } while (IcrLowReg.Bits.DeliveryStatus != 0);
267 } while (IcrLowReg.Bits.DeliveryStatus != 0);
317 ASSERT (ApicBaseMsr.Bits.En != 0);
318 if (ApicBaseMsr.Bits.Extd != 0) {
359 ApicBaseMsr.Bits.Extd = 1; [all...] |
/external/icu/icu4c/source/test/perf/unisetperf/draft/ |
bitset.cpp | 91 BitSet(const UnicodeSet &set, UErrorCode &errorCode) : bits(shortBits), restSet(set.clone()) { 138 // Set bits for the start of the range. 155 bits=(int64_t *)uprv_malloc(bitHash->countKeys()*8); 157 if(bits!=NULL) { 158 bitHash->invert(bits); 160 bits=shortBits; 165 latin1Set[0]=(uint32_t)bits[0]; 166 latin1Set[1]=(uint32_t)(bits[0]>>32); 167 latin1Set[2]=(uint32_t)bits[1]; 168 latin1Set[3]=(uint32_t)(bits[1]>>32) 197 int64_t *bits; member in class:BitSet [all...] |
/external/syslinux/com32/lib/zlib/ |
infback.c | 83 unsigned sym, bits; local 94 bits = 9; 95 inflate_table(LENS, state->lens, 288, &(next), &(bits), state->work); 101 bits = 5; 102 inflate_table(DISTS, state->lens, 32, &(next), &(bits), state->work); 126 bits = state->bits; \ 137 state->bits = bits; \ 144 bits = 0; 253 unsigned bits; \/* bits in bit buffer *\/ local [all...] |
/toolchain/binutils/binutils-2.25/binutils/ |
sysroff.info | 43 (("module type") (4 bits) ("mt") 48 (("spare")(4 bits) ("spare1")) 55 (("address field length") (4 bits) ("afl")) 56 (("spare")(3 bits) ("spare2")) 79 (("format") (2 bits) ("format") 83 (("spare") (6 bits) ("spare1")) 99 (("format") (2 bits) ("format")) 100 (("spare") (6 bits) ("spare")) 105 (("contents") (4 bits) ("contents") 112 (("concat") (4 bits) ("concat" [all...] |