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  /toolchain/binutils/binutils-2.25/include/opcode/
mips.h 786 "p" 16 bit PC relative branch target address (OP_*_DELTA)
829 "N" 3 bit branch condition code (OP_*_BCC) (only used for mips4 and up)
967 "+'" 26 bit PC relative branch target address
968 "+"" 21 bit PC relative branch target address
    [all...]
  /art/compiler/optimizing/
block_builder.cc 43 // Create branch targets at the start/end of the TryItem range. These are
64 // Create branch targets for exception handlers.
77 // the locations these instructions branch to.
  /art/dexdump/
dexdump_cfg.cc 206 // Branch: something with at most two targets.
226 /* offset to switch table is a relative branch-style offset */
320 // Loop update. Have a break-out if the next instruction is a branch target and thus in
  /dalvik/dexgen/src/com/android/dexgen/rop/code/
Rop.java 40 /** indicates a two-way branch */
43 /** indicates a switch-style branch */
46 /** indicates a throw-style branch (both always-throws and may-throw) */
  /dalvik/docs/
java-constraints.html 183 All jump and branch targets must be opcodes within the same method.
185 directly reachable via a jump or branch instruction.
987 jump or branch, a return, or an <code>athrow</code> instruction. It
  /dalvik/dx/src/com/android/dx/rop/code/
Rop.java 40 /** indicates a two-way branch */
43 /** indicates a switch-style branch */
46 /** indicates a throw-style branch (both always-throws and may-throw) */
  /external/autotest/server/hosts/
testbed.py 34 # branch/target/build_id[:serial][#count],
197 is in the format of branch/target/build_id[:serial]. Serial is
212 'branch/target/build_id[:serial][#count]', image)
  /external/jacoco/org.jacoco.core.test/src/org/jacoco/core/internal/analysis/
MethodAnalyzerTest.java 95 // === Scenario: simple if branch ===
156 // === Scenario: branch which merges back ===
216 // === Scenario: branch which jump backwards ===
  /external/jacoco/org.jacoco.doc/docroot/doc/
flow.html 24 Implementing a coverage tool that supports statement (C0) as well as branch
286 instructions (instruction coverage) that have been executed. For branch
408 document allows to efficiently record instruction and branch coverage. In
  /external/javassist/src/main/javassist/bytecode/stackmap/
MapMaker.java 311 if (prev.incoming > 0) { // the first instruction is a branch target.
334 * Returns true if cur is a branch target.
474 // Is the first instruction a branch target?
  /external/libavc/common/arm/
ih264_inter_pred_filters_luma_horz_a9q.s 114 subs r12, r6, #8 @if wd=8 branch to loop_8
118 subs r12, r6, #4 @if wd=4 branch to loop_4
208 beq end_func @ Branch if height==4
ih264_inter_pred_luma_horz_qpel_a9q.s 120 subs r12, r6, #8 @if wd=8 branch to loop_8
125 subs r12, r6, #4 @if wd=4 branch to loop_4
223 beq end_func @ Branch if height==4
  /external/llvm/include/llvm/CodeGen/
Passes.h 207 /// MachineBlockPlacement - This pass places basic blocks based on branch
212 /// basic block placement using branch probabilities and block frequency
228 /// branch folding).
  /external/llvm/lib/ExecutionEngine/RuntimeDyld/
RuntimeDyldELF.cpp 483 // Write 24 bit relative value to the branch instruction.
    [all...]
  /external/llvm/lib/IR/
BasicBlock.cpp 69 // is no indirect branch). Handle these cases by zapping the BlockAddress
365 /// as part of the original basic block, an unconditional branch is added to
388 // Add a branch instruction to the newly formed basic block.
  /external/llvm/lib/Target/AMDGPU/
SIFixSGPRCopies.cpp 20 /// BRANCH %cond BB1, BB2
35 /// BRANCH %cond BB1, BB2
50 /// BRANCH %cond BB1, BB2
  /external/llvm/lib/Transforms/Utils/
BreakCriticalEdges.cpp 133 // Create our unconditional branch.
137 // Branch to the new block, breaking the edge.
260 // header of its loop (adding a branch into a loop elsewhere would
  /external/proguard/src/proguard/optimize/peephole/
MethodInliner.java 380 // Replace the return instruction by a branch instruction.
391 // for the sake of any other branch instructions.
531 // Only inline the method if it doesn't branch backward while there
  /external/regex-re2/doc/
syntax.txt 56 (?|x|y|z) branch numbering reset NOT SUPPORTED
356 (?(cond)true|false) conditional branch NOT SUPPORTED
357 (?(cond)true) conditional branch NOT SUPPORTED
  /external/swiftshader/src/Shader/
PixelProgram.cpp     [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
MBlazeSchedule3.td 70 // Branch instruction with one source operand register. The instruction takes
79 // Conditional branch instruction with two source operand registers. The
89 // Branch and link instruction with one destination register and one source
MBlazeSchedule5.td 76 // Branch instruction with one source operand register. The instruction takes
87 // Conditional branch instruction with two source operand registers. The
99 // Branch and link instruction with one destination register and one source
  /external/swiftshader/third_party/LLVM/lib/Target/XCore/
XCoreISelDAGToDAG.cpp 273 // indirect branch or used in a TokenFactor which is the operand of the
274 // indirect branch then build a new chain which uses the chain coming into
285 // will be taken. If no resource is ready we branch to the address which was
  /external/swiftshader/third_party/LLVM/lib/VMCore/
BasicBlock.cpp 66 // is no indirect branch). Handle these cases by zapping the BlockAddress
289 /// as part of the original basic block, an unconditional branch is added to
312 // Add a branch instruction to the newly formed basic block.
  /external/swiftshader/third_party/LLVM/test/Transforms/JumpThreading/
basic.ll 109 ;; This tests that the branch in 'merge' can be cloned up into T1.
179 ;; This tests that the branch in 'merge' can be cloned up into T1.
364 ; Should branch to the return block instead of through BB1.

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<<71727374757677787980>>