/external/llvm/lib/DebugInfo/PDB/Raw/ |
DbiStreamBuilder.cpp | 51 llvm::AlignOf<DbiStream::HeaderInfo>::Alignment));
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/external/llvm/lib/ExecutionEngine/Orc/ |
OrcMCJITReplacement.h | 38 uint8_t *allocateCodeSection(uintptr_t Size, unsigned Alignment, 42 ClientMM->allocateCodeSection(Size, Alignment, SectionID, 48 uint8_t *allocateDataSection(uintptr_t Size, unsigned Alignment, 51 uint8_t *Addr = ClientMM->allocateDataSection(Size, Alignment, SectionID,
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/external/llvm/lib/Transforms/Scalar/ |
LICM.cpp | 771 int Alignment; 794 AliasSetTracker &ast, LoopInfo &li, DebugLoc dl, int alignment, 798 LI(li), DL(std::move(dl)), Alignment(alignment), AATags(AATags) {} [all...] |
/external/mesa3d/src/mesa/drivers/dri/intel/ |
intel_pixel_read.c | 105 if (pack->Alignment != 1 || pack->SwapBytes || pack->LsbFirst) {
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
LegalizeTypesGeneric.cpp | 121 unsigned Alignment = 124 SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment); 143 false, MinAlign(Alignment, IncrementSize)); 212 unsigned Alignment = LD->getAlignment(); 219 isVolatile, isNonTemporal, Alignment); 228 MinAlign(Alignment, IncrementSize)); 397 unsigned Alignment = St->getAlignment(); 411 isVolatile, isNonTemporal, Alignment); 419 MinAlign(Alignment, IncrementSize));
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/frameworks/av/media/libeffects/lvm/lib/Bundle/src/ |
LVM_Private.h | 127 LVM_UINT16 Alignment; /* Byte alignment */
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/frameworks/base/core/tests/coretests/src/android/text/ |
StaticLayoutTest.java | 19 import static android.text.Layout.Alignment.ALIGN_NORMAL; 25 import android.text.Layout.Alignment; 240 Alignment align = ALIGN_NORMAL; 260 LayoutBuilder setAlignment(Alignment align) {
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/frameworks/compile/mclinker/lib/LD/ |
BranchIslandFactory.cpp | 50 while (frag != NULL && frag->getKind() == Fragment::Alignment) {
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/packages/apps/Test/connectivity/sl4n/rapidjson/test/unittest/ |
allocatorstest.cpp | 65 TEST(Allocator, Alignment) {
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/prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
dmksctrl.h | 47 LONGLONG Alignment;
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/external/llvm/lib/Target/X86/ |
X86FastISel.cpp | 89 unsigned &ResultReg, unsigned Alignment = 1); 350 unsigned Alignment) { 401 if (IsNonTemporal && Alignment >= 16 && HasSSE41) 403 else if (Alignment >= 16) 410 if (IsNonTemporal && Alignment >= 16 && HasSSE41) 412 else if (Alignment >= 16) 422 if (IsNonTemporal && Alignment >= 16) 424 else if (Alignment >= 16) 432 if (IsNonTemporal && Alignment >= 32 && HasAVX2) 435 Opc = (Alignment >= 32) ? X86::VMOVAPSYrm : X86::VMOVUPSYrm [all...] |
/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Library/MtrrLib/ |
MtrrLib.c | 833 This function first checks the alignment of the base address.
834 If the alignment of the base address <= Length, cover the memory range
835 (BaseAddress, alignment) by a MTRR, then BaseAddress += alignment and
836 Length -= alignment. Repeat the step until alignment > Length.
857 UINT64 Alignment;
866 // Calculate the alignment of the base address.
868 Alignment = LShiftU64 (1, (UINTN)LowBitSet64 (BaseAddress));
870 if (Alignment > Length) { [all...] |
/cts/tests/tests/text/src/android/text/cts/ |
DynamicLayoutTest.java | 47 private static final Layout.Alignment DEFAULT_ALIGN = Layout.Alignment.ALIGN_CENTER;
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/device/linaro/bootloader/edk2/ArmVirtPkg/PciHostBridgeDxe/ |
PciHostBridge.c | 377 // Get the number of '1' in Alignment.
379 BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);
[all...] |
/device/linaro/bootloader/edk2/DuetPkg/PciBusNoEnumerationDxe/ |
PciEnumeratorSupport.c | 893 PciIoDevice->PciBar[BarIndex].Alignment = 0;
915 PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
923 PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
956 PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
978 PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
1008 PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
1018 PciIoDevice->PciBar[BarIndex].Alignment = PciIoDevice->PciBar[BarIndex].Length - 1;
1030 PciIoDevice->PciBar[BarIndex].Alignment = 0;
[all...] |
/device/linaro/bootloader/edk2/OvmfPkg/PciHostBridgeDxe/ |
PciHostBridge.c | 537 // Get the number of '1' in Alignment.
541 RootBridgeInstance->ResAllocNode[Index].Alignment
[all...] |
/external/eigen/Eigen/src/Core/ |
StableNorm.h | 172 || (int(internal::evaluator<DerivedCopyClean>::Alignment)>0) // FIXME Alignment)>0 might not be enough 175 typedef typename internal::conditional<CanAlign, Ref<const Matrix<Scalar,Dynamic,1,0,blockSize,1>, internal::evaluator<DerivedCopyClean>::Alignment>,
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/external/llvm/include/llvm/ExecutionEngine/Orc/ |
OrcRemoteTargetClient.h | 82 uint8_t *allocateCodeSection(uintptr_t Size, unsigned Alignment, 85 Unmapped.back().CodeAllocs.emplace_back(Size, Alignment); 90 << " bytes, alignment " << Alignment << ")\n"); 94 uint8_t *allocateDataSection(uintptr_t Size, unsigned Alignment, 98 Unmapped.back().RODataAllocs.emplace_back(Size, Alignment); 103 << " bytes, alignment " << Alignment << ")\n"); 107 Unmapped.back().RWDataAllocs.emplace_back(Size, Alignment); 112 << " bytes, alignment " << Alignment << ")\n") [all...] |
/external/llvm/test/MC/MachO/ARM/ |
darwin-Thumb-reloc.s | 48 @ CHECK: Alignment: 2 69 @ CHECK: Alignment: 2
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/external/llvm/unittests/ExecutionEngine/Orc/ |
ObjectLinkingLayerTest.cpp | 51 uint8_t *allocateDataSection(uintptr_t Size, unsigned Alignment, 57 return SectionMemoryManager::allocateDataSection(Size, Alignment,
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/packages/apps/Dialer/java/com/android/incallui/autoresizetext/ |
AutoResizeTextView.java | 24 import android.text.Layout.Alignment; 232 Alignment.ALIGN_NORMAL,
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/art/compiler/optimizing/ |
nodes_vector.h | 26 // Memory alignment, represented as an offset relative to a base, where 0 <= offset < base, 27 // and base is a power of two. For example, the value Alignment(16, 0) means memory is 28 // perfectly aligned at a 16-byte boundary, whereas the value Alignment(16, 4) means 30 class Alignment { 32 Alignment(size_t base, size_t offset) : base_(base), offset_(offset) { 169 // Abstraction of a vector operation that references memory, with an alignment. 170 // The Android runtime guarantees at least "component size" alignment for array 183 void SetAlignment(Alignment alignment) { alignment_ = alignment; } [all...] |
/external/llvm/lib/MC/ |
ELFObjectWriter.cpp | 136 void align(unsigned Alignment); 140 bool ZLibStyle, unsigned Alignment); 220 uint32_t Link, uint32_t Info, uint64_t Alignment, 239 void ELFObjectWriter::align(unsigned Alignment) { 240 uint64_t Padding = OffsetToAlignment(getStream().tell(), Alignment); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelDAGToDAG.cpp | 267 // Get the alignment operand for a NEON VLD or VST instruction. [all...] |
/device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/ |
LegacyBios.c | 104 @param Alignment Address alignment. Bit mapped. First non-zero
105 bit from right is alignment.
119 IN UINTN Alignment,
136 Regs.X.DX = (UINT16) Alignment;
243 UINTN Alignment;
252 Alignment = 0;
296 &Alignment,
493 &Alignment,
512 &Alignment,
[all...] |