| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ISelLowering.h | 29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
44 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
49 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
|
| SIISelLowering.h | 41 SDValue Loweri1ContextSwitch(SDValue Op, SelectionDAG &DAG,
43 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
44 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
45 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
52 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| MachineRegisterInfo.h | 348 MachineOperand *Op;
349 explicit defusechain_iterator(MachineOperand *op) : Op(op) {
352 if (op) {
353 if ((!ReturnUses && op->isUse()) ||
354 (!ReturnDefs && op->isDef()) ||
355 (SkipDebug && op->isDebug()))
366 defusechain_iterator(const defusechain_iterator &I) : Op(I.Op) {}
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.h | 35 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
36 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
40 SDValue MergeVectorStore(const SDValue &Op, SelectionDAG &DAG) const;
44 SDValue LowerFREM(SDValue Op, SelectionDAG &DAG) const;
45 SDValue LowerFCEIL(SDValue Op, SelectionDAG &DAG) const;
46 SDValue LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerFRINT(SDValue Op, SelectionDAG &DAG) const;
48 SDValue LowerFNEARBYINT(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerFROUND32(SDValue Op, SelectionDAG &DAG) const
[all...] |
| R600ISelLowering.h | 34 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
66 SDValue lowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
67 SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
68 SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
69 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
71 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
74 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
75 SDValue LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const;
77 SDValue lowerPrivateExtLoad(SDValue Op, SelectionDAG &DAG) const;
78 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const
[all...] |
| SIISelLowering.h | 28 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
30 SDValue lowerImplicitZextParam(SelectionDAG &DAG, SDValue Op,
33 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
34 SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const;
35 SDValue LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
36 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
38 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
39 SDValue LowerFastFDIV(SDValue Op, SelectionDAG &DAG) const;
40 SDValue LowerFDIV32(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/XCore/InstPrinter/ |
| XCoreInstPrinter.cpp | 75 const MCOperand &Op = MI->getOperand(OpNo);
76 if (Op.isReg()) {
77 printRegName(O, Op.getReg());
81 if (Op.isImm()) {
82 O << Op.getImm();
86 assert(Op.isExpr() && "unknown operand kind in printOperand");
87 printExpr(Op.getExpr(), &MAI, O);
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/InstPrinter/ |
| MBlazeInstPrinter.cpp | 37 const MCOperand &Op = MI->getOperand(OpNo);
38 if (Op.isReg()) {
39 O << getRegisterName(Op.getReg());
40 } else if (Op.isImm()) {
41 O << (int32_t)Op.getImm();
43 assert(Op.isExpr() && "unknown operand kind in printOperand");
44 O << *Op.getExpr();
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/AsmParser/ |
| MBlazeAsmParser.cpp | 222 MBlazeOperand *Op = new MBlazeOperand(Token);
223 Op->Tok.Data = Str.data();
224 Op->Tok.Length = Str.size();
225 Op->StartLoc = S;
226 Op->EndLoc = S;
227 return Op;
231 MBlazeOperand *Op = new MBlazeOperand(Register);
232 Op->Reg.RegNum = RegNum;
233 Op->StartLoc = S;
234 Op->EndLoc = E
[all...] |
| /external/spirv-llvm/lib/SPIRV/ |
| SPIRVLowerBool.cpp | 79 auto Op = I.getOperand(0);
80 auto Zero = getScalarOrVectorConstantInt(Op->getType(), 0, false);
81 auto Cmp = new ICmpInst(&I, CmpInst::ICMP_NE, Op, Zero);
86 auto Op = I.getOperand(0);
87 if (isBoolType(Op->getType())) {
91 auto Sel = SelectInst::Create(Op, One, Zero, "", &I);
96 auto Op = I.getOperand(0);
97 if (isBoolType(Op->getType())) {
101 auto Sel = SelectInst::Create(Op, One, Zero, "", &I);
|
| /external/skia/src/gpu/effects/ |
| GrCoverageSetOpXP.h | 28 static const GrXPFactory* Get(SkRegion::Op regionOp, bool invertCoverage = false);
31 constexpr GrCoverageSetOpXPFactory(SkRegion::Op regionOp, bool invertCoverage);
46 SkRegion::Op fRegionOp;
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 360 SDValue MipsSETargetLowering::LowerOperation(SDValue Op,
362 switch(Op.getOpcode()) {
363 case ISD::LOAD: return lowerLOAD(Op, DAG);
364 case ISD::STORE: return lowerSTORE(Op, DAG);
365 case ISD::SMUL_LOHI: return lowerMulDiv(Op, MipsISD::Mult, true, true, DAG);
366 case ISD::UMUL_LOHI: return lowerMulDiv(Op, MipsISD::Multu, true, true, DAG);
367 case ISD::MULHS: return lowerMulDiv(Op, MipsISD::Mult, false, true, DAG);
368 case ISD::MULHU: return lowerMulDiv(Op, MipsISD::Multu, false, true, DAG);
369 case ISD::MUL: return lowerMulDiv(Op, MipsISD::Mult, true, false, DAG);
370 case ISD::SDIVREM: return lowerMulDiv(Op, MipsISD::DivRem, true, true, DAG)
[all...] |
| MipsSEISelLowering.h | 38 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
65 SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const;
66 SDValue lowerSTORE(SDValue Op, SelectionDAG &DAG) const;
68 SDValue lowerMulDiv(SDValue Op, unsigned NewOpc, bool HasLo, bool HasHi,
71 SDValue lowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
72 SDValue lowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const;
73 SDValue lowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const;
74 SDValue lowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
75 SDValue lowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
78 SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelLowering.h | 558 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
579 virtual bool IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const;
596 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
605 virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op,
628 virtual void LowerAsmOperandForConstraint(SDValue Op,
717 SDValue BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain, SDValue StackSlot,
788 std::pair<SDValue,SDValue> FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG,
793 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
794 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
795 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.h | 73 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
79 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
80 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
81 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
82 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
83 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
84 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 109 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
169 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
170 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
171 SDValue LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const;
172 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
173 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
174 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
175 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
176 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
177 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Bitcode/Reader/ |
| BitstreamReader.cpp | 55 const BitCodeAbbrevOp &Op) {
56 assert(!Op.isLiteral() && "Not to be used with literals!");
59 switch (Op.getEncoding()) {
64 assert((unsigned)Op.getEncodingData() <= Cursor.MaxChunkSize);
65 return Cursor.Read((unsigned)Op.getEncodingData());
67 assert((unsigned)Op.getEncodingData() <= Cursor.MaxChunkSize);
68 return Cursor.ReadVBR64((unsigned)Op.getEncodingData());
76 const BitCodeAbbrevOp &Op) {
77 assert(!Op.isLiteral() && "Not to be used with literals!");
80 switch (Op.getEncoding())
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineRegisterInfo.h | [all...] |
| /external/clang/lib/CodeGen/ |
| CGExprComplex.cpp | 150 ComplexPairTy EmitCast(CastKind CK, Expr *Op, QualType DestTy);
235 ComplexPairTy EmitBinAdd(const BinOpInfo &Op);
236 ComplexPairTy EmitBinSub(const BinOpInfo &Op);
237 ComplexPairTy EmitBinMul(const BinOpInfo &Op);
238 ComplexPairTy EmitBinDiv(const BinOpInfo &Op);
241 const BinOpInfo &Op);
423 ComplexPairTy ComplexExprEmitter::EmitCast(CastKind CK, Expr *Op,
428 // Atomic to non-atomic casts may be more than a no-op for some platforms and
435 return Visit(Op);
438 LValue origLV = CGF.EmitLValue(Op);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 80 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
86 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
89 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
90 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
91 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
92 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
93 SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) const;
94 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsISelLowering.h | 104 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
128 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
129 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
130 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
131 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
132 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
133 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
134 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
135 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
136 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 149 // Compiler barrier only; generate a no-op.
288 // ATOMIC_LOAD_<op>.
291 // Operand 1: the second operand of <op>, in the high bits of an i32
411 void LowerAsmOperandForConstraint(SDValue Op,
458 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
493 SDValue lowerSETCC(SDValue Op, SelectionDAG &DAG) const;
494 SDValue lowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
495 SDValue lowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
508 SDValue lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
509 SDValue lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 123 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
125 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
126 SDValue LowerEXTRACT_VECTOR(SDValue Op, SelectionDAG &DAG) const;
127 SDValue LowerINSERT_VECTOR(SDValue Op, SelectionDAG &DAG) const;
128 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
129 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
130 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const;
131 SDValue LowerPREFETCH(SDValue Op, SelectionDAG &DAG) const;
132 SDValue LowerEH_LABEL(SDValue Op, SelectionDAG &DAG) const;
133 SDValue LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/Lanai/InstPrinter/ |
| LanaiInstPrinter.cpp | 149 const MCOperand &Op = MI->getOperand(OpNo);
150 if (Op.isReg())
151 OS << "%" << getRegisterName(Op.getReg());
152 else if (Op.isImm())
153 OS << formatHex(Op.getImm());
155 assert(Op.isExpr() && "Expected an expression");
156 Op.getExpr()->print(OS, &MAI);
162 const MCOperand &Op = MI->getOperand(OpNo);
163 if (Op.isImm()) {
164 OS << '[' << formatHex(Op.getImm()) << ']'
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.h | 80 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
81 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
82 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
83 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
84 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const;
|
