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  /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/
ArchDebugSupport.c 43 if (((PcdGet32 (PcdExceptionsIgnoredByDebugger) & ~(BIT1 | BIT3)) & (1 << Index)) != 0) {
  /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/
PchRegs.h 47 #define BIT1 0x0002
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/
UartInit.c 29 #define B_PCH_LPC_PMC_BASE_EN BIT1 // Enable Bit
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Guid/
PlatformCpuInfo.h 56 #define CPU_FEATURES_ENABLE BIT1
BoardFeatures.h 48 #define B_BOARD_FEATURES_LAN_MARVELL BIT1
142 #define B_BOARD_FEATURES_CHIPSET_VIDEO BIT1
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/
BoardId.c 171 mBoardId |= (UINT32)((Data8 >> 1) & BIT1);
  /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/
Acpi60.h 197 #define EFI_ACPI_6_0_8042 BIT1
208 #define EFI_ACPI_6_0_ARM_PSCI_USE_HVC BIT1
215 #define EFI_ACPI_6_0_WBINVD_FLUSH BIT1
264 #define EFI_ACPI_6_0_64BIT_WAKE_SUPPORTED_F BIT1
523 #define EFI_ACPI_6_0_PERFORMANCE_INTERRUPT_MODEL BIT1
    [all...]
Acpi20.h 205 #define EFI_ACPI_2_0_8042 BIT1
212 #define EFI_ACPI_2_0_WBINVD_FLUSH BIT1
  /device/linaro/bootloader/edk2/ArmVirtPkg/Library/QemuFwCfgLib/
QemuFwCfgLib.c 68 #define FW_CFG_DMA_CTL_READ BIT1
136 if ((Features & BIT1) != 0) {
  /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/MultiPlatformLib/BoardClkGens/
BoardClkGens.h 68 #define CK410_GENERATOR_CLOCK_FREERUN_BIT (BIT0 | BIT1 | BIT2)
76 #define CK505_GENERATOR_SPREAD_SPECTRUM_BIT (BIT0 | BIT1)
  /device/linaro/bootloader/edk2/MdeModulePkg/Library/BaseSerialPortLib16550/
BaseSerialPortLib16550.c 44 #define B_UART_MCR_RTS BIT1
368 if ((PciRead16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister) & (BIT0 | BIT1)) != 0x00) {
369 PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1));
404 if ((PciRead16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister) & (BIT0 | BIT1)) != 0x00) {
405 PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1));
    [all...]
  /device/linaro/bootloader/edk2/OptionRomPkg/Bus/Usb/UsbNetworking/Ax88772b/
Ax88772.h 69 #define USB_IS_BULK_ENDPOINT(Attribute) (((Attribute) & (BIT0 | BIT1)) == USB_ENDPOINT_BULK) ///< Return TRUE/FALSE for BULK type
70 #define USB_IS_INTERRUPT_ENDPOINT(Attribute) (((Attribute) & (BIT0 | BIT1)) == USB_ENDPOINT_INTERRUPT) ///< Return TRUE/FALSE for INTERRUPT type
300 #define FLAG_TYPE_AX88772 BIT1
    [all...]
  /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/LcdGraphicsOutputDxe/
LcdGraphicsOutputDxe.h 154 #define CLEARLOADMODE ~(BIT2 | BIT1)
  /device/linaro/bootloader/OpenPlatformPkg/Drivers/Usb/DwUsbDxe/
DwUsbDxe.h 44 #define DW_DC_INTERRUPT_SOF BIT1
84 #define DW_CTRL_FUNCTION_STATUS BIT1
100 #define DW_OTG_CTRL_DP_PULLDOWN BIT1
105 #define DW_OTG_STATUS_A_B_SESS_VLD BIT1
  /device/linaro/bootloader/edk2/ArmPkg/Include/Chipset/
AArch64.h 96 #define CNTHCTL_EL2_EL1PCEN BIT1
  /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/
ArmVExpressSysConfig.c 36 #define SYS_CFGSTAT_ERROR BIT1
  /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigRuntimeLib/
ArmVExpressSysConfigRuntimeLib.c 39 #define SYS_CFGSTAT_ERROR BIT1
  /device/linaro/bootloader/edk2/BaseTools/Source/C/Include/Common/
BaseTypes.h 222 #define BIT1 0x00000002
  /device/linaro/bootloader/edk2/DuetPkg/SataControllerDxe/
SataController.h 41 #define B_AHCI_CAP_NPS (BIT4 | BIT3 | BIT2 | BIT1 | BIT0) // Number of Ports
  /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/UhciPei/
UhcPeim.h 44 #define USBCMD_HCRESET BIT1 /* Host reset */
55 #define USBSTS_ERROR BIT1 /* Interrupt due to error */
64 #define USBINTR_RESUME BIT1 /* Resume interrupt enable */
82 #define USBPORTSC_CSC BIT1 /* Connect Status Change */
    [all...]
  /device/linaro/bootloader/edk2/MdeModulePkg/Include/Protocol/
DisplayProtocol.h 148 #define HII_DISPLAY_LOCK BIT1
  /device/linaro/bootloader/edk2/Omap35xxPkg/LcdGraphicsOutputDxe/
LcdGraphicsOutputDxe.h 154 #define CLEARLOADMODE ~(BIT2 | BIT1)
  /device/linaro/bootloader/edk2/OvmfPkg/SataControllerDxe/
SataController.h 41 #define B_AHCI_CAP_NPS (BIT4 | BIT3 | BIT2 | BIT1 | BIT0) // Number of Ports
  /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/
MrcWrapper.h 95 #define PDAT_MRC_FLAG_SCRAMBLE_EN BIT1
  /system/bt/embdrv/sbc/decoder/include/
oi_stddefs.h 226 #define BIT1 \

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