| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyRegisterInfo.cpp | 113 BuildMI(MBB, *II, II->getDebugLoc(), TII->get(WebAssembly::CONST_I32),
117 BuildMI(MBB, *II, II->getDebugLoc(), TII->get(WebAssembly::ADD_I32),
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| WebAssemblyPrepareForLiveIntervals.cpp | 117 BuildMI(Entry, Entry.begin(), DebugLoc(),
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| WebAssemblyFixIrreducibleControlFlow.cpp | 187 MachineInstrBuilder MIB = BuildMI(*Dispatch, Dispatch->end(), DebugLoc(),
241 BuildMI(*Split, Split->end(), DebugLoc(), TII.get(WebAssembly::CONST_I32),
244 BuildMI(*Split, Split->end(), DebugLoc(), TII.get(WebAssembly::BR))
|
| /external/llvm/lib/Target/X86/ |
| X86FixupSetCC.cpp | 167 BuildMI(MBB, FlagsDefMI, MI.getDebugLoc(), TII->get(X86::MOV32r0),
172 BuildMI(*ZExt->getParent(), ZExt, ZExt->getDebugLoc(),
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| X86PadShortFunction.cpp | 216 BuildMI(*MBB, MBBI, DL, TII->get(X86::NOOP));
217 BuildMI(*MBB, MBBI, DL, TII->get(X86::NOOP));
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| X86CallFrameOptimization.cpp | 485 Push = BuildMI(MBB, Context.Call, DL, TII->get(PushOpcode))
497 BuildMI(MBB, Context.Call, DL, TII->get(X86::IMPLICIT_DEF), UndefReg);
498 BuildMI(MBB, Context.Call, DL, TII->get(X86::INSERT_SUBREG), Reg)
513 Push = BuildMI(MBB, Context.Call, DL, TII->get(PushOpcode));
522 Push = BuildMI(MBB, Context.Call, DL, TII->get(PushOpcode))
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeRegisterInfo.cpp | 107 New = BuildMI(MF,Old->getDebugLoc(),TII.get(MBlaze::ADDIK),MBlaze::R1)
111 New = BuildMI(MF,Old->getDebugLoc(),TII.get(MBlaze::ADDIK),MBlaze::R1)
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 177 BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TargetOpcode::COPY),
297 BuildMI(*MBB, InsertPos, Op.getDebugLoc(),
340 BuildMI(*MBB, InsertPos, Op.getNode()->getDebugLoc(),
463 BuildMI(*MBB, InsertPos, DL, TII->get(TargetOpcode::COPY), NewReg)
510 BuildMI(*MBB, InsertPos, Node->getDebugLoc(),
526 BuildMI(*MBB, InsertPos, Node->getDebugLoc(),
559 BuildMI(*MF, Node->getDebugLoc(), TII->get(Opc), VRBase);
597 BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TargetOpcode::COPY),
615 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II, NewVReg);
663 return BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsHazardSchedule.cpp | 141 BuildMI(MF, I->getDebugLoc(), TII->get(Mips::NOP)));
|
| MipsISelLowering.cpp | [all...] |
| MipsInstrInfo.cpp | 54 BuildMI(MBB, MI, DL, get(Mips::NOP));
102 MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID);
134 BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(FBB);
141 BuildMI(&MBB, DL, get(UncondBrOpc)).addMBB(TBB);
430 MIB = BuildMI(*I->getParent(), I, I->getDebugLoc(), get(NewOpc));
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| Mips16ISelDAGToDAG.cpp | 83 BuildMI(MBB, I, DL, TII.get(Mips::GotPrologue16), V0)
88 BuildMI(MBB, I, DL, TII.get(Mips::SllX16), V2).addReg(V0).addImm(16);
89 BuildMI(MBB, I, DL, TII.get(Mips::AdduRxRyRz16), GlobalBaseReg)
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZLongBranch.cpp | 354 BuildMI(*MBB, MI, DL, TII->get(AddOpcode))
358 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL))
373 BuildMI(*MBB, MI, DL, TII->get(CompareOpcode))
376 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL))
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| SystemZInstrInfo.cpp | 214 BuildMI(MBB, MBBI, DL, get(LowLowOpcode), DestReg)
219 BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)
412 BuildMI(&MBB, DL, get(SystemZ::J)).addMBB(TBB);
420 BuildMI(&MBB, DL, get(SystemZ::BRC))
426 BuildMI(&MBB, DL, get(SystemZ::J)).addMBB(FBB);
696 BuildMI(MBB, MBBI, DL, get(Opcode), DestReg)
710 addFrameReference(BuildMI(MBB, MBBI, DL, get(StoreOpcode))
725 addFrameReference(BuildMI(MBB, MBBI, DL, get(LoadOpcode), DestReg),
859 BuildMI(*MBB, MI, MI.getDebugLoc(), get(NewOpcode))
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86VZeroUpper.cpp | 99 BuildMI(*MBB, I, dl, TII->get(X86::VZEROUPPER));
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| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| AlphaRegisterInfo.cpp | 104 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Alpha::LDA), Alpha::R30)
108 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Alpha::LDA), Alpha::R30)
170 MachineInstr* nMI=BuildMI(MF, MI.getDebugLoc(),
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | 324 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADDXri),
347 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(TargetOpcode::COPY),
380 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc1), TmpReg)
384 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
399 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
404 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
431 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
436 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::LDRXui),
443 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADRP),
448 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(AArch64::ADDXri)
[all...] |
| AArch64LoadStoreOptimizer.cpp | 685 BuildMI(*MBB, InsertionPoint, DL, TII->get(getMatchingWideOpcode(Opc)))
710 BuildMI(*MBB, InsertionPoint, DL, TII->get(getBitExtrOpcode(*Rt2MI)))
718 BitExtMI2 = BuildMI(*MBB, InsertionPoint, DL, TII->get(AArch64::ANDWri))
724 BuildMI(*MBB, InsertionPoint, DL, TII->get(getBitExtrOpcode(*RtMI)))
734 BitExtMI1 = BuildMI(*MBB, InsertionPoint, DL, TII->get(AArch64::ANDWri))
740 BuildMI(*MBB, InsertionPoint, DL, TII->get(getBitExtrOpcode(*RtMI)))
749 BuildMI(*MBB, InsertionPoint, DL, TII->get(getBitExtrOpcode(*Rt2MI)))
774 MIB = BuildMI(*MBB, InsertionPoint, DL, TII->get(getMatchingWideOpcode(Opc)))
868 MIB = BuildMI(*MBB, InsertionPoint, DL, TII->get(getMatchingPairOpcode(Opc)))
902 BuildMI(*MBB, InsertionPoint, DL, TII->get(TargetOpcode::KILL), DstRegW
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | 167 UpdateMI = BuildMI(MF, MI.getDebugLoc(),
177 UpdateMI = BuildMI(MF, MI.getDebugLoc(),
187 UpdateMI = BuildMI(MF, MI.getDebugLoc(),
201 UpdateMI = BuildMI(MF, MI.getDebugLoc(),
209 UpdateMI = BuildMI(MF, MI.getDebugLoc(),
224 BuildMI(MF, MI.getDebugLoc(), get(MemOpc), MI.getOperand(0).getReg())
229 MemMI = BuildMI(MF, MI.getDebugLoc(), get(MemOpc))
240 BuildMI(MF, MI.getDebugLoc(), get(MemOpc), MI.getOperand(0).getReg())
245 MemMI = BuildMI(MF, MI.getDebugLoc(), get(MemOpc))
431 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB).addImm(ARMCC::AL).addReg(0)
[all...] |
| ARMLoadStoreOptimizer.cpp | 527 AddDefaultT1CC(BuildMI(MBB, MBBI, DL, TII->get(ARM::tSUBi8), Base), true)
545 BuildMI(MBB, MBBI, DL, TII->get(ARM::tSUBi8), Base), true)
706 BuildMI(MBB, InsertBefore, DL, TII->get(ARM::tMOVSr), NewBase)
709 BuildMI(MBB, InsertBefore, DL, TII->get(ARM::tMOVr), NewBase)
719 BuildMI(MBB, InsertBefore, DL, TII->get(BaseOpc), NewBase)
724 BuildMI(MBB, InsertBefore, DL, TII->get(BaseOpc), NewBase), true)
728 BuildMI(MBB, InsertBefore, DL, TII->get(BaseOpc), NewBase)
765 MIB = BuildMI(MBB, InsertBefore, DL, TII->get(Opcode));
778 MIB = BuildMI(MBB, InsertBefore, DL, TII->get(Opcode));
800 MachineInstrBuilder MIB = BuildMI(MBB, InsertBefore, DL
[all...] |
| A15SDOptimizer.cpp | 432 AddDefaultPred(BuildMI(MBB,
449 BuildMI(MBB,
463 BuildMI(MBB,
481 AddDefaultPred(BuildMI(MBB,
495 BuildMI(MBB,
511 BuildMI(MBB,
|
| /external/llvm/lib/Target/Lanai/ |
| LanaiInstrInfo.cpp | 45 BuildMI(MBB, Position, DL, get(Lanai::OR_I_LO), DestinationRegister)
63 BuildMI(MBB, Position, DL, get(Lanai::SW_RI))
83 BuildMI(MBB, Position, DL, get(Lanai::LDW_RI), DestinationRegister)
517 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), DefMI->getDesc(), DestReg);
674 BuildMI(&MBB, DL, get(Lanai::BT)).addMBB(TrueBlock);
682 BuildMI(&MBB, DL, get(Lanai::BRCC)).addMBB(TrueBlock).addImm(ConditionalCode);
689 BuildMI(&MBB, DL, get(Lanai::BT)).addMBB(FalseBlock);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | 171 UpdateMI = BuildMI(MF, MI->getDebugLoc(),
178 UpdateMI = BuildMI(MF, MI->getDebugLoc(),
183 UpdateMI = BuildMI(MF, MI->getDebugLoc(),
194 UpdateMI = BuildMI(MF, MI->getDebugLoc(),
199 UpdateMI = BuildMI(MF, MI->getDebugLoc(),
210 MemMI = BuildMI(MF, MI->getDebugLoc(),
214 MemMI = BuildMI(MF, MI->getDebugLoc(),
221 MemMI = BuildMI(MF, MI->getDebugLoc(),
225 MemMI = BuildMI(MF, MI->getDebugLoc(),
417 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB).addImm(ARMCC::AL).addReg(0)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 69 addFrameReference(BuildMI(MBB, MI, DL, get(Opc)), FrameIdx)
99 addFrameReference(BuildMI(MBB, MI, DL, get(Opc), DestReg), FrameIdx);
122 BuildMI(MBB, I, DL, get(Opc), DestReg)
332 BuildMI(&MBB, DL, get(SystemZ::JMP)).addMBB(TBB);
339 BuildMI(&MBB, DL, getBrCond(CC)).addMBB(TBB);
344 BuildMI(&MBB, DL, get(SystemZ::JMP)).addMBB(FBB);
|
| /external/llvm/lib/CodeGen/GlobalISel/ |
| MachineIRBuilder.cpp | 60 MachineInstr *NewMI = BuildMI(getMF(), DL, getTII().get(Opcode));
|
