| /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 147 ENTRY(ESP) \
|
| /external/valgrind/coregrind/m_sigframe/ |
| sigframe-x86-linux.c | 376 SC2(esp,ESP);
424 Addr esp = esp_top_of_frame; local
432 esp -= sizeof(*frame);
433 esp = VG_ROUNDDN(esp, 16);
434 frame = (struct sigframe *)esp;
436 if (! ML_(sf_maybe_extend_stack)(tst, esp, sizeof(*frame), flags))
441 esp, offsetof(struct sigframe, vg) );
465 esp, offsetof(struct sigframe, vg) )
482 Addr esp = esp_top_of_frame; local
547 Addr esp; local
655 Addr esp; local
[all...] |
| /device/linaro/bootloader/edk2/IntelFspPkg/FspSecCore/Ia32/ |
| FspApiEntry.s | 81 pinsrw $0x00, %esp, %xmm6
82 ror $0x10, %esp
83 pinsrw $0x01, %esp, %xmm6
84 ror $0x10, %esp
104 movd %xmm6, %esp
134 movd %xmm6, %esp
257 # esp -> LoadMicrocodeParams pointer
259 # esp Preserved
273 cmpl $0x00, %esp
275 movl 4(%esp), %eax #dword ptr [] Parameter pointer
[all...] |
| /external/libpcap/ |
| grammar.y | 300 %token IPV6 ICMPV6 AH ESP
495 | ESP { $$ = Q_ESP; }
|
| grammar.c | 430 ESP = 325,
552 #define ESP 325
989 "HID6", "AID", "LSH", "RSH", "LEN", "IPV6", "ICMPV6", "AH", "ESP",
[all...] |
| /external/selinux/mcstrans/share/examples/nato/setrans.d/ |
| eyes-only.conf | 610 ~c268=ESP # Spain
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 287 // The SIB byte must be used if the base is ESP/RSP/R12, all of which
290 BaseRegNo != N86::ESP &&
301 // If the base is not EBP/ESP and there is no displacement, use simple
325 assert(IndexReg.getReg() != X86::ESP &&
326 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!");
364 else // Examples: [ESP+1*<noreg>+4] or [scaled idx]+disp32 (MOD=0,BASE=5)
372 IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86CodeEmitter.cpp | 498 // The SIB byte must be used if the base is ESP/RSP/R12, all of which
501 BaseRegNo != N86::ESP &&
512 // If the base is not EBP/ESP and there is no displacement, use simple
535 assert(IndexReg.getReg() != X86::ESP &&
536 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!");
571 else // Examples: [ESP+1*<noreg>+4] or [scaled idx]+disp32 (MOD=0,BASE=5)
580 IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
[all...] |
| X86AsmPrinter.cpp | 309 assert(IndexReg.getReg() != X86::ESP &&
310 "X86 doesn't allow scaling by ESP");
|
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/x86/x86asm/ |
| plan9x.go | 236 ESP: "SP",
|
| gnu.go | 621 if x.Scale == 0 || x.Index == 0 && x.Scale == 1 && (x.Base == ESP || x.Base == RSP || x.Base == 0 && inst.Mode == 64) {
697 ESP: "%esp",
|
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/x86/x86asm/ |
| plan9x.go | 236 ESP: "SP",
|
| gnu.go | 621 if x.Scale == 0 || x.Index == 0 && x.Scale == 1 && (x.Base == ESP || x.Base == RSP || x.Base == 0 && inst.Mode == 64) {
697 ESP: "%esp",
|
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.cpp | 745 unsigned SP = Is64Bit ? X86::RSP : X86::ESP;
[all...] |
| X86AsmPrinter.cpp | 262 assert(IndexReg.getReg() != X86::ESP &&
263 "X86 doesn't allow scaling by ESP");
|
| /art/compiler/optimizing/ |
| code_generator_x86.h | 595 assembler_.lock()->addl(Address(ESP, 0), Immediate(0));
|
| /device/linaro/bootloader/edk2/IntelFrameworkPkg/Include/Protocol/ |
| LegacyBios.h | [all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Universal/DebugSupportDxe/X64/ |
| AsmFuncs.S | 81 DebugStackBegin : .ascii "<<<< DbgStkBegin" # initial debug ESP == DebugStackBegin, set in stub
153 // At this point, the stub has saved the current application stack esp into AppRsp
|
| /external/libunwind/src/ptrace/ |
| _UPT_reg_offset.c | 263 UNW_R_OFF(ESP, esp)
|
| /external/llvm/lib/DebugInfo/CodeView/ |
| EnumTables.cpp | 50 CV_ENUM_CLASS_ENT(RegisterId, ESP),
|
| /external/llvm/lib/DebugInfo/PDB/ |
| PDBExtras.cpp | 116 CASE_OUTPUT_ENUM_CLASS_NAME(codeview::RegisterId, ESP, OS)
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86Operand.h | 398 case X86::RSP: return X86::ESP;
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 157 ENTRY(ESP) \
|
| /external/valgrind/VEX/auxprogs/ |
| genoffsets.c | 94 GENOFFSET(X86,x86,ESP);
|
| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ |
| AsmFuncs.asm | 204 push [esp]
205 mov dword ptr [esp + 4], 0
210 mov ebp, esp ; save esp in ebp
214 and esp, 0fffffff0h
215 sub esp, 12
225 push eax ; original ESP
276 sub esp, 8
277 sidt fword ptr [esp]
278 sub esp, 8
[all...] |
