| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCDuplexInfo.cpp | 470 // %R16<def> = C2_cmovenewit %P0<internal>, 0, %R16<imp-use,undef>;
670 case Hexagon::R16:
[all...] |
| /prebuilts/go/darwin-x86/src/regexp/syntax/ |
| parse.go | [all...] |
| /prebuilts/go/linux-x86/src/regexp/syntax/ |
| parse.go | [all...] |
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 39 PPC::R16, PPC::R17, PPC::R18, PPC::R19,
50 PPC::R16, PPC::R17, PPC::R18, PPC::R19,
[all...] |
| /prebuilts/go/darwin-x86/src/encoding/xml/ |
| xml.go | 1237 R16: []unicode.Range16{
[all...] |
| /prebuilts/go/linux-x86/src/encoding/xml/ |
| xml.go | 1237 R16: []unicode.Range16{
[all...] |
| /external/llvm/lib/Target/Hexagon/Disassembler/ |
| HexagonDisassembler.cpp | 496 Hexagon::R15, Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19,
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | 403 Alpha::R16, Alpha::R17, Alpha::R18, Alpha::R19, Alpha::R20, Alpha::R21};
[all...] |
| /prebuilts/go/darwin-x86/src/unicode/ |
| maketables.go | [all...] |
| /prebuilts/go/linux-x86/src/unicode/ |
| maketables.go | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.cpp | 777 Hexagon::R17, Hexagon::R16, Hexagon::R19, Hexagon::R18,
[all...] |
| HexagonInstrInfo.cpp | 110 (Reg >= Hexagon::R16 && Reg <= Hexagon::R23);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 151 {PPC::R16, -64},
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | [all...] |
| /prebuilts/go/darwin-x86/src/reflect/ |
| all_test.go | [all...] |
| /prebuilts/go/linux-x86/src/reflect/ |
| all_test.go | [all...] |
