| /prebuilts/go/darwin-x86/src/runtime/ |
| rt0_linux_ppc64le.s | 18 MOVD R17, 48(R1)
84 MOVD 48(R1), R17
|
| mkduff.go | 165 // R17 (aka REGRT2): ptr to destination memory
167 // R16 and R17 are updated as a side effect
171 fmt.Fprintln(w, "\tMOVD.P\tR27, 8(R17)")
|
| /prebuilts/go/linux-x86/src/math/big/ |
| arith_ppc64x.s | 128 MOVD (R10)(R25), R17
142 ADDC R17, R6
|
| /prebuilts/go/linux-x86/src/runtime/ |
| rt0_linux_ppc64le.s | 18 MOVD R17, 48(R1)
84 MOVD 48(R1), R17
|
| mkduff.go | 165 // R17 (aka REGRT2): ptr to destination memory
167 // R16 and R17 are updated as a side effect
171 fmt.Fprintln(w, "\tMOVD.P\tR27, 8(R17)")
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeRegisterInfo.cpp | 80 Reserved.set(MBlaze::R17);
|
| MBlazeFrameLowering.cpp | 261 // Build the prologue SWI for R17, R18
265 BuildMI(MENT, MENTI, ENTDL, TII.get(MBlaze::SWI), MBlaze::R17)
285 // Build the epilogue LWI for R17, R18
289 BuildMI(MEXT, MEXTI, EXTDL, TII.get(MBlaze::LWI), MBlaze::R17)
|
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/gen/ |
| ARM64Ops.go | 50 "R17",
126 gp = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30")
380 // arg0 = address of dst memory (in R17 aka arm64.REGRT2, changed as side effect)
385 // R16, R17 changed as side effect
391 inputs: []regMask{buildReg("R17"), buildReg("R16")},
392 clobbers: buildReg("R16 R17 R30"),
399 // arg0 = address of dst memory (in R17 aka arm64.REGRT2, changed as side effect)
405 // MOVD.P Rtmp, 8(R17)
414 inputs: []regMask{buildReg("R17"), buildReg("R16"), gp},
415 clobbers: buildReg("R16 R17"),
[all...] |
| MIPS64Ops.go | 51 "R17",
130 gp = buildReg("R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R31")
|
| /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/gen/ |
| ARM64Ops.go | 50 "R17",
126 gp = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30")
380 // arg0 = address of dst memory (in R17 aka arm64.REGRT2, changed as side effect)
385 // R16, R17 changed as side effect
391 inputs: []regMask{buildReg("R17"), buildReg("R16")},
392 clobbers: buildReg("R16 R17 R30"),
399 // arg0 = address of dst memory (in R17 aka arm64.REGRT2, changed as side effect)
405 // MOVD.P Rtmp, 8(R17)
414 inputs: []regMask{buildReg("R17"), buildReg("R16"), gp},
415 clobbers: buildReg("R16 R17"),
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/ |
| operand_test.go | 471 {"R17", "R17"},
604 {"R17", "R17"},
687 {"R17", "R17"},
|
| /prebuilts/go/linux-x86/src/cmd/asm/internal/asm/ |
| operand_test.go | 471 {"R17", "R17"},
604 {"R17", "R17"},
687 {"R17", "R17"},
|
| /prebuilts/go/darwin-x86/src/crypto/md5/ |
| md5block_ppc64le.s | 41 MOVWZ R5, R17
181 ADD R17, R5
|
| /prebuilts/go/linux-x86/src/crypto/md5/ |
| md5block_ppc64le.s | 41 MOVWZ R5, R17
181 ADD R17, R5
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.h | 63 { Hexagon::R17, -4 }, { Hexagon::R16, -8 }, { Hexagon::D8, -8 },
|
| /external/llvm/lib/Target/Lanai/Disassembler/ |
| LanaiDisassembler.cpp | 158 Lanai::R12, Lanai::R13, Lanai::R14, Lanai::RCA, Lanai::R16, Lanai::R17,
|
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/ |
| inst.go | 80 R17
|
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/ |
| inst.go | 80 R17
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPURegisterInfo.cpp | 71 case SPU::R17: return 17;
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Efi/Protocol/DebugSupport/ |
| DebugSupport.h | 340 UINT64 R17;
|
| /external/syslinux/gpxe/src/include/gpxe/efi/Protocol/ |
| DebugSupport.h | 306 UINT64 R17;
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 168 PPC::R16, PPC::R17, PPC::R18, PPC::R19,
179 PPC::R16, PPC::R17, PPC::R18, PPC::R19,
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 107 PPC::R16, PPC::R17, PPC::R18, PPC::R19,
133 PPC::R16, PPC::R17, PPC::R18, PPC::R19,
|
| /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/ |
| DebugSupport.h | 309 UINT64 R17;
|
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCChecker.cpp | 549 Register = Hexagon::R17;
|
