| /external/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.cpp | 108 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23,
117 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23,
|
| HexagonFrameLowering.h | 66 { Hexagon::R23, -28 }, { Hexagon::R22, -32 }, { Hexagon::D11, -32 },
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/MCTargetDesc/ |
| MBlazeBaseInfo.h | 128 case MBlaze::R23 : return 23;
193 case 23 : return MBlaze::R23;
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCFrameLowering.h | 162 {PPC::R23, -36},
241 {PPC::R23, -68},
|
| PPCRegisterInfo.cpp | 108 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
134 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
|
| /prebuilts/go/darwin-x86/src/runtime/ |
| asm_mips64x.s | 24 MOVV $(-64*1024), R23
25 ADDV R23, R29, R1
314 MOVV $MAXSIZE, R23; \
315 SGTU R1, R23, R23; \
316 BNE R23, 3(PC); \
851 // g (R30) and REGTMP (R23) might be clobbered by load_g. They
853 MOVV R23, savedR23-16(SP)
862 MOVV savedR23-16(SP), R23
|
| rt0_linux_ppc64le.s | 24 MOVD R23, 96(R1)
90 MOVD 96(R1), R23
|
| asm_mipsx.s | 24 MOVW $(-64*1024), R23
25 ADD R23, R29, R1
312 MOVW $MAXSIZE, R23; \
313 SGTU R1, R23, R23; \
314 BNE R23, 3(PC); \
924 // g (R30), R3 and REGTMP (R23) might be clobbered by load_g. R30 and R23
926 MOVW R23, R8
935 MOVW R8, R23
[all...] |
| /prebuilts/go/linux-x86/src/runtime/ |
| asm_mips64x.s | 24 MOVV $(-64*1024), R23
25 ADDV R23, R29, R1
314 MOVV $MAXSIZE, R23; \
315 SGTU R1, R23, R23; \
316 BNE R23, 3(PC); \
851 // g (R30) and REGTMP (R23) might be clobbered by load_g. They
853 MOVV R23, savedR23-16(SP)
862 MOVV savedR23-16(SP), R23
|
| rt0_linux_ppc64le.s | 24 MOVD R23, 96(R1)
90 MOVD 96(R1), R23
|
| asm_mipsx.s | 24 MOVW $(-64*1024), R23
25 ADD R23, R29, R1
312 MOVW $MAXSIZE, R23; \
313 SGTU R1, R23, R23; \
314 BNE R23, 3(PC); \
924 // g (R30), R3 and REGTMP (R23) might be clobbered by load_g. R30 and R23
926 MOVW R23, R8
935 MOVW R8, R23
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeRegisterInfo.cpp | 61 MBlaze::R20, MBlaze::R21, MBlaze::R22, MBlaze::R23,
|
| /prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/ |
| operand_test.go | 478 {"R23", "R23"},
611 {"R23", "R23"},
694 {"R23", "R23"},
|
| /prebuilts/go/linux-x86/src/cmd/asm/internal/asm/ |
| operand_test.go | 478 {"R23", "R23"},
611 {"R23", "R23"},
694 {"R23", "R23"},
|
| /external/llvm/lib/Target/Lanai/Disassembler/ |
| LanaiDisassembler.cpp | 159 Lanai::R18, Lanai::R19, Lanai::R20, Lanai::R21, Lanai::R22, Lanai::R23,
|
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/ |
| inst.go | 86 R23
|
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/ |
| inst.go | 86 R23
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPURegisterInfo.cpp | 77 case SPU::R23: return 23;
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Efi/Protocol/DebugSupport/ |
| DebugSupport.h | 346 UINT64 R23;
|
| /external/syslinux/gpxe/src/include/gpxe/efi/Protocol/ |
| DebugSupport.h | 312 UINT64 R23;
|
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCInstrInfo.cpp | 238 case R23:
525 (Reg >= Hexagon::R16 && Reg <= Hexagon::R23));
|
| HexagonMCChecker.cpp | 531 Register = Hexagon::R23;
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 169 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
180 PPC::R20, PPC::R21, PPC::R22, PPC::R23,
|
| /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/ |
| DebugSupport.h | 315 UINT64 R23;
|
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/gen/ |
| MIPS64Ops.go | 17 // register (R23).
57 // R23 = REGTMP not used in regalloc
|
