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  /prebuilts/go/linux-x86/src/cmd/internal/obj/arm64/
a.out.go 208 // compiler allocates register variables R7-R25
  /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/gen/
ARM64Ops.go 58 "R25",
126 gp = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30")
  /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/gen/
ARM64Ops.go 58 "R25",
126 gp = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30")
  /external/llvm/lib/Target/Hexagon/
HexagonFrameLowering.cpp 779 Hexagon::R25, Hexagon::R24, Hexagon::R27, Hexagon::R26,
    [all...]
  /external/llvm/lib/Target/PowerPC/AsmParser/
PPCAsmParser.cpp 41 PPC::R24, PPC::R25, PPC::R26, PPC::R27,
52 PPC::R24, PPC::R25, PPC::R26, PPC::R27,
    [all...]
  /external/llvm/lib/Target/Hexagon/Disassembler/
HexagonDisassembler.cpp 498 Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,
    [all...]
  /external/llvm/lib/Target/PowerPC/
PPCFrameLowering.cpp 142 {PPC::R25, -28},
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
SPUISelLowering.cpp     [all...]

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