| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/gen/ |
| MIPS64Ops.go | 60 // R26 reserved by kernel
|
| MIPSOps.go | 59 // R26 reserved by kernel
|
| /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/gen/ |
| MIPS64Ops.go | 60 // R26 reserved by kernel
|
| MIPSOps.go | 59 // R26 reserved by kernel
|
| /external/llvm/lib/Target/Hexagon/Disassembler/ |
| HexagonDisassembler.cpp | 498 Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | 482 SDValue Copy = DAG.getCopyToReg(Chain, dl, Alpha::R26,
[all...] |
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/arm64/ |
| ssa.go | 723 // Closure pointer is R26 (arm64.REGCTXT).
|
| /prebuilts/go/linux-x86/src/cmd/compile/internal/arm64/ |
| ssa.go | 723 // Closure pointer is R26 (arm64.REGCTXT).
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.cpp | 779 Hexagon::R25, Hexagon::R24, Hexagon::R27, Hexagon::R26,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 141 {PPC::R26, -24},
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | [all...] |
