/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Efi/Protocol/DebugSupport/ |
DebugSupport.h | 351 UINT64 R28;
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/external/syslinux/gpxe/src/include/gpxe/efi/Protocol/ |
DebugSupport.h | 317 UINT64 R28;
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/external/llvm/lib/Target/PowerPC/Disassembler/ |
PPCDisassembler.cpp | 171 PPC::R28, PPC::R29, PPC::R30, PPC::R31 182 PPC::R28, PPC::R29, PPC::R30, PPC::R31
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
PPCRegisterInfo.cpp | 110 PPC::R28, PPC::R29, PPC::R30, PPC::R31, 136 PPC::R28, PPC::R29, PPC::R30, PPC::R31,
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/device/linaro/bootloader/edk2/MdePkg/Include/Protocol/ |
DebugSupport.h | 320 UINT64 R28;
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/prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/ |
operand_test.go | 483 {"R28", "R28"},
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/prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/gen/ |
MIPSOps.go | 61 "R28", 114 gp = buildReg("R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R28 R31")
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PPC64Ops.go | 48 "R28", 123 gp = buildReg("R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29")
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MIPS64Ops.go | 62 // R28 = REGSB not used in regalloc
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ARM64Ops.go | 61 "g", // aka R28
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/prebuilts/go/linux-x86/src/cmd/asm/internal/asm/ |
operand_test.go | 483 {"R28", "R28"},
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/prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/gen/ |
MIPSOps.go | 61 "R28", 114 gp = buildReg("R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R28 R31")
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PPC64Ops.go | 48 "R28", 123 gp = buildReg("R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29")
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MIPS64Ops.go | 62 // R28 = REGSB not used in regalloc
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ARM64Ops.go | 61 "g", // aka R28
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/external/llvm/lib/Target/PowerPC/AsmParser/ |
PPCAsmParser.cpp | 42 PPC::R28, PPC::R29, PPC::R30, PPC::R31 53 PPC::R28, PPC::R29, PPC::R30, PPC::R31 [all...] |
/external/llvm/lib/Target/Hexagon/Disassembler/ |
HexagonDisassembler.cpp | 498 Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29, [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonFrameLowering.cpp | 604 .addReg(Hexagon::R28); [all...] |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFrameLowering.cpp | 139 {PPC::R28, -16}, [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
SPUISelLowering.cpp | [all...] |