/external/valgrind/none/tests/amd64/ |
redundantRexW.c | 152 __asm__ __volatile__( 177 __asm__ __volatile__( 194 __asm__ __volatile__( 211 __asm__ __volatile__( 228 __asm__ __volatile__( 245 __asm__ __volatile__( 262 __asm__ __volatile__( 279 __asm__ __volatile__( 296 __asm__ __volatile__( 313 __asm__ __volatile__( [all...] |
/external/valgrind/none/tests/ppc32/ |
test_dfp1.c | 45 __asm__ __volatile__ ("mtcr %0" : : "b"(_arg) : ALLCR ); 48 __asm__ __volatile__ ("mtxer %0" : : "b"(_arg) : "xer" ); 51 __asm__ __volatile__ ("mfcr %0" : "=b"(_lval) ) 54 __asm__ __volatile__ ("mfxer %0" : "=b"(_lval) ) 70 __asm__ __volatile__ ("mtfsf 0xFF, %0" : : "f"(_d) ); \ 74 __asm__ __volatile__ ("mffs %0" : "=f"(_arg) ) 77 __asm__ __volatile__ ("mtfsf 1, %0, 0, 1" : : "f"(f14) ) 85 __asm__ __volatile__ ("dadd. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); 87 __asm__ __volatile__ ("dadd %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)); 93 __asm__ __volatile__ ("dsub. %0, %1, %2" : "=f" (f18) : "f" (f14),"f" (f16)) [all...] |
/device/linaro/bootloader/edk2/MdePkg/Library/BaseSynchronizationLib/Ia32/ |
GccInline.c | 39 __asm__ __volatile__ (
76 __asm__ __volatile__ (
117 __asm__ __volatile__ (
159 __asm__ __volatile__ (
199 __asm__ __volatile__ (
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/device/linaro/bootloader/edk2/MdePkg/Library/BaseSynchronizationLib/X64/ |
GccInline.c | 40 __asm__ __volatile__ (
76 __asm__ __volatile__ (
119 __asm__ __volatile__ (
163 __asm__ __volatile__ (
205 __asm__ __volatile__ (
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/external/valgrind/VEX/test/ |
fsave.c | 7 asm __volatile__("fninit"); 8 asm __volatile__("fldpi"); 9 asm __volatile__("fld1"); 10 asm __volatile__("fldln2"); 11 asm __volatile__("fsave (%0)" : : "r" (p) : "memory" );
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/external/vixl/src/aarch64/ |
cpu-aarch64.cc | 66 __asm__ __volatile__("mrs %[ctr], ctr_el0" // NOLINT(runtime/references) 106 __asm__ __volatile__( 125 __asm__ __volatile__( 144 __asm__ __volatile__( 158 __asm__ __volatile__(
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/external/libvpx/libvpx/vpx_dsp/mips/ |
loopfilter_macros_dspr2.h | 27 __asm__ __volatile__( \ 37 __asm__ __volatile__( \ 47 __asm__ __volatile__( \ 57 __asm__ __volatile__( \ 67 __asm__ __volatile__( \ 77 __asm__ __volatile__( \ 87 __asm__ __volatile__( \ 100 __asm__ __volatile__( \ 112 __asm__ __volatile__( \ 124 __asm__ __volatile__( \ [all...] |
/development/ndk/platforms/android-9/arch-x86/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/external/fio/arch/ |
arch-sh.h | 23 #define nop __asm__ __volatile__ ("nop": : :"memory") 28 __asm__ __volatile__ ("synco": : :"memory"); \ 30 __asm__ __volatile__ (" " : : : "memory"); \
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/external/libvpx/libvpx/third_party/libyuv/source/ |
rotate_mips.cc | 27 __asm__ __volatile__ ( 111 __asm__ __volatile__ ( 315 __asm__ __volatile__ (
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/external/libyuv/files/source/ |
rotate_dspr2.cc | 29 __asm__ __volatile__( 110 __asm__ __volatile__( 313 __asm__ __volatile__(
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/external/valgrind/none/tests/x86/ |
bt_literal.c | 15 __asm__ __volatile__ ( 58 __asm__ __volatile__ ( 100 __asm__ __volatile__ (
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/prebuilts/ndk/r10/platforms/android-12/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r10/platforms/android-13/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r10/platforms/android-14/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r10/platforms/android-15/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r10/platforms/android-16/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r10/platforms/android-17/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r10/platforms/android-18/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r10/platforms/android-19/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r10/platforms/android-9/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r11/platforms/android-12/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r11/platforms/android-13/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r11/platforms/android-14/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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/prebuilts/ndk/r11/platforms/android-15/arch-x86/usr/include/asm/ |
tlbflush_32.h | 27 #define __native_flush_tlb() do { unsigned int tmpreg; __asm__ __volatile__( "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" : "=r" (tmpreg) :: "memory"); } while (0) 29 #define __native_flush_tlb_global() do { unsigned int tmpreg, cr4, cr4_orig; __asm__ __volatile__( "movl %%cr4, %2; # turn off PGE \n" "movl %2, %1; \n" "andl %3, %1; \n" "movl %1, %%cr4; \n" "movl %%cr3, %0; \n" "movl %0, %%cr3; # flush TLB \n" "movl %2, %%cr4; # turn PGE back on \n" : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig) : "i" (~X86_CR4_PGE) : "memory"); } while (0) 30 #define __native_flush_tlb_single(addr) __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
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