| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-ept.d | 10 [ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
11 [ ]*[a-f0-9]+: 66 44 0f 38 80 19 invept \(%rcx\),%r11
12 [ ]*[a-f0-9]+: 66 0f 38 81 19 invvpid \(%rcx\),%rbx
13 [ ]*[a-f0-9]+: 66 44 0f 38 81 19 invvpid \(%rcx\),%r11
14 [ ]*[a-f0-9]+: 66 0f 38 80 19 invept \(%rcx\),%rbx
15 [ ]*[a-f0-9]+: 66 44 0f 38 80 19 invept \(%rcx\),%r11
16 [ ]*[a-f0-9]+: 66 0f 38 81 19 invvpid \(%rcx\),%rbx
17 [ ]*[a-f0-9]+: 66 44 0f 38 81 19 invvpid \(%rcx\),%r11
|
| x86-64-mem-intel.d | 11 [ ]*[a-f0-9]+: 0f 01 06 sgdt \[rsi\]
12 [ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\]
13 [ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\]
14 [ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\]
15 [ ]*[a-f0-9]+: 0f 01 3e invlpg BYTE PTR \[rsi\]
16 [ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\]
17 [ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\]
18 [ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\]
19 [ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[rsi\]
20 [ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[rsi\
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| x86-64-arch-2-lzcnt.d | 11 [ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
12 [ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
13 [ ]*[a-f0-9]+: 0f 05 syscall
14 [ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
15 [ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
16 [ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
17 [ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
18 [ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
19 [ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
20 [ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%eb
[all...] |
| x86-64-arch-2-prefetchw.d | 11 [ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
12 [ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
13 [ ]*[a-f0-9]+: 0f 05 syscall
14 [ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
15 [ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
16 [ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
17 [ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
18 [ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
19 [ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
20 [ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%eb
[all...] |
| x86-64-arch-2.d | 10 [ ]*[a-f0-9]+: 0f 44 d8 cmove %eax,%ebx
11 [ ]*[a-f0-9]+: 0f ae 38 clflush \(%rax\)
12 [ ]*[a-f0-9]+: 0f 05 syscall
13 [ ]*[a-f0-9]+: 0f fc dc paddb %mm4,%mm3
14 [ ]*[a-f0-9]+: f3 0f 58 dc addss %xmm4,%xmm3
15 [ ]*[a-f0-9]+: f2 0f 58 dc addsd %xmm4,%xmm3
16 [ ]*[a-f0-9]+: 66 0f d0 dc addsubpd %xmm4,%xmm3
17 [ ]*[a-f0-9]+: 66 0f 38 01 dc phaddw %xmm4,%xmm3
18 [ ]*[a-f0-9]+: 66 0f 38 41 d9 phminposuw %xmm1,%xmm3
19 [ ]*[a-f0-9]+: f2 0f 38 f1 d9 crc32l %ecx,%eb
[all...] |
| x86-64-ept-intel.d | 10 [ ]*[a-f0-9]+: 66 0f 38 80 19 invept rbx,OWORD PTR \[rcx\]
11 [ ]*[a-f0-9]+: 66 44 0f 38 80 19 invept r11,OWORD PTR \[rcx\]
12 [ ]*[a-f0-9]+: 66 0f 38 81 19 invvpid rbx,OWORD PTR \[rcx\]
13 [ ]*[a-f0-9]+: 66 44 0f 38 81 19 invvpid r11,OWORD PTR \[rcx\]
14 [ ]*[a-f0-9]+: 66 0f 38 80 19 invept rbx,OWORD PTR \[rcx\]
15 [ ]*[a-f0-9]+: 66 44 0f 38 80 19 invept r11,OWORD PTR \[rcx\]
16 [ ]*[a-f0-9]+: 66 0f 38 81 19 invvpid rbx,OWORD PTR \[rcx\]
17 [ ]*[a-f0-9]+: 66 44 0f 38 81 19 invvpid r11,OWORD PTR \[rcx\]
|
| x86-64-fsgs-intel.d | 11 [ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase ebx
12 [ ]*[a-f0-9]+: f3 48 0f ae c3 rdfsbase rbx
13 [ ]*[a-f0-9]+: f3 41 0f ae c0 rdfsbase r8d
14 [ ]*[a-f0-9]+: f3 49 0f ae c0 rdfsbase r8
15 [ ]*[a-f0-9]+: f3 0f ae cb rdgsbase ebx
16 [ ]*[a-f0-9]+: f3 48 0f ae cb rdgsbase rbx
17 [ ]*[a-f0-9]+: f3 41 0f ae c8 rdgsbase r8d
18 [ ]*[a-f0-9]+: f3 49 0f ae c8 rdgsbase r8
19 [ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase ebx
20 [ ]*[a-f0-9]+: f3 48 0f ae d3 wrfsbase rb
[all...] |
| x86-64-fsgs.d | 10 [ ]*[a-f0-9]+: f3 0f ae c3 rdfsbase %ebx
11 [ ]*[a-f0-9]+: f3 48 0f ae c3 rdfsbase %rbx
12 [ ]*[a-f0-9]+: f3 41 0f ae c0 rdfsbase %r8d
13 [ ]*[a-f0-9]+: f3 49 0f ae c0 rdfsbase %r8
14 [ ]*[a-f0-9]+: f3 0f ae cb rdgsbase %ebx
15 [ ]*[a-f0-9]+: f3 48 0f ae cb rdgsbase %rbx
16 [ ]*[a-f0-9]+: f3 41 0f ae c8 rdgsbase %r8d
17 [ ]*[a-f0-9]+: f3 49 0f ae c8 rdgsbase %r8
18 [ ]*[a-f0-9]+: f3 0f ae d3 wrfsbase %ebx
19 [ ]*[a-f0-9]+: f3 48 0f ae d3 wrfsbase %rb
[all...] |
| x86-64-mem-intel.d | 11 [ ]*[a-f0-9]+: 0f 01 06 sgdt \[rsi\]
12 [ ]*[a-f0-9]+: 0f 01 0e sidt \[rsi\]
13 [ ]*[a-f0-9]+: 0f 01 16 lgdt \[rsi\]
14 [ ]*[a-f0-9]+: 0f 01 1e lidt \[rsi\]
15 [ ]*[a-f0-9]+: 0f 01 3e invlpg BYTE PTR \[rsi\]
16 [ ]*[a-f0-9]+: 0f c7 0e cmpxchg8b QWORD PTR \[rsi\]
17 [ ]*[a-f0-9]+: 48 0f c7 0e cmpxchg16b OWORD PTR \[rsi\]
18 [ ]*[a-f0-9]+: 0f c7 36 vmptrld QWORD PTR \[rsi\]
19 [ ]*[a-f0-9]+: 66 0f c7 36 vmclear QWORD PTR \[rsi\]
20 [ ]*[a-f0-9]+: f3 0f c7 36 vmxon QWORD PTR \[rsi\
[all...] |
| xsave-intel.d | 11 [ ]*[a-f0-9]+: 0f ae 2b xrstor \[ebx\]
12 [ ]*[a-f0-9]+: 0f ae 23 xsave \[ebx\]
13 [ ]*[a-f0-9]+: 0f ae 33 xsaveopt \[ebx\]
14 [ ]*[a-f0-9]+: 0f 01 d0 xgetbv
15 [ ]*[a-f0-9]+: 0f 01 d1 xsetbv
16 [ ]*[a-f0-9]+: 0f ae 29 xrstor \[ecx\]
17 [ ]*[a-f0-9]+: 0f ae 21 xsave \[ecx\]
18 [ ]*[a-f0-9]+: 0f ae 31 xsaveopt \[ecx\]
|
| x86-64-bmi2-intel.d | 12 [ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx ebx,eax,0x7
13 [ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[rcx\],0x7
14 [ ]*[a-f0-9]+: c4 43 7b f0 f9 07 rorx r15d,r9d,0x7
15 [ ]*[a-f0-9]+: c4 63 7b f0 39 07 rorx r15d,DWORD PTR \[rcx\],0x7
16 [ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx esi,ebx,ea
[all...] |
| x86-64-bmi2.d | 11 [ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx \$0x7,%eax,%ebx
12 [ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%rcx\),%ebx
13 [ ]*[a-f0-9]+: c4 43 7b f0 f9 07 rorx \$0x7,%r9d,%r15d
14 [ ]*[a-f0-9]+: c4 63 7b f0 39 07 rorx \$0x7,\(%rcx\),%r15d
15 [ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx %eax,%ebx,%es
[all...] |
| x86-64-mpx.d | 10 [ ]*[a-f0-9]+: f3 41 0f 1b 0b bndmk \(%r11\),%bnd1
11 [ ]*[a-f0-9]+: f3 0f 1b 08 bndmk \(%rax\),%bnd1
12 [ ]*[a-f0-9]+: f3 0f 1b 0c 25 99 03 00 00 bndmk 0x399,%bnd1
13 [ ]*[a-f0-9]+: f3 41 0f 1b 49 03 bndmk 0x3\(%r9\),%bnd1
14 [ ]*[a-f0-9]+: f3 0f 1b 48 03 bndmk 0x3\(%rax\),%bnd1
15 [ ]*[a-f0-9]+: f3 42 0f 1b 0c 25 03 00 00 00 bndmk 0x3\(,%r12,1\),%bnd1
16 [ ]*[a-f0-9]+: f3 0f 1b 0c 08 bndmk \(%rax,%rcx,1\),%bnd1
17 [ ]*[a-f0-9]+: f3 41 0f 1b 4c 03 03 bndmk 0x3\(%r11,%rax,1\),%bnd1
18 [ ]*[a-f0-9]+: f3 42 0f 1b 4c 0b 03 bndmk 0x3\(%rbx,%r9,1\),%bnd1
19 [ ]*[a-f0-9]+: 66 41 0f 1a 0b bndmov \(%r11\),%bnd
[all...] |
| x86-64-evex-wig1-intel.d | 12 [ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps rax,xmm29,0xab
13 [ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps rax,xmm29,0x7b
14 [ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps r8,xmm29,0x7b
15 [ ]*[a-f0-9]+: 62 63 fd 08 17 29 7b vextractps DWORD PTR \[rcx\],xmm29,0x7b
16 [ ]*[a-f0-9]+: 62 23 fd 08 17 ac f0 23 01 00 00 7b vextractps DWORD PTR \[rax\+r14\*8\+0x123\],xmm29,0x7b
17 [ ]*[a-f0-9]+: 62 63 fd 08 17 6a 7f 7b vextractps DWORD PTR \[rdx\+0x1fc\],xmm29,0x7b
18 [ ]*[a-f0-9]+: 62 63 fd 08 17 aa 00 02 00 00 7b vextractps DWORD PTR \[rdx\+0x200\],xmm29,0x7b
19 [ ]*[a-f0-9]+: 62 63 fd 08 17 6a 80 7b vextractps DWORD PTR \[rdx-0x200\],xmm29,0x7b
20 [ ]*[a-f0-9]+: 62 63 fd 08 17 aa fc fd ff ff 7b vextractps DWORD PTR \[rdx-0x204\],xmm29,0x7
[all...] |
| x86-64-evex-wig1.d | 12 [ ]*[a-f0-9]+: 62 63 fd 08 17 e8 ab vextractps \$0xab,%xmm29,%rax
13 [ ]*[a-f0-9]+: 62 63 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%rax
14 [ ]*[a-f0-9]+: 62 43 fd 08 17 e8 7b vextractps \$0x7b,%xmm29,%r8
15 [ ]*[a-f0-9]+: 62 63 fd 08 17 29 7b vextractps \$0x7b,%xmm29,\(%rcx\)
16 [ ]*[a-f0-9]+: 62 23 fd 08 17 ac f0 23 01 00 00 7b vextractps \$0x7b,%xmm29,0x123\(%rax,%r14,8\)
17 [ ]*[a-f0-9]+: 62 63 fd 08 17 6a 7f 7b vextractps \$0x7b,%xmm29,0x1fc\(%rdx\)
18 [ ]*[a-f0-9]+: 62 63 fd 08 17 aa 00 02 00 00 7b vextractps \$0x7b,%xmm29,0x200\(%rdx\)
19 [ ]*[a-f0-9]+: 62 63 fd 08 17 6a 80 7b vextractps \$0x7b,%xmm29,-0x200\(%rdx\)
20 [ ]*[a-f0-9]+: 62 63 fd 08 17 aa fc fd ff ff 7b vextractps \$0x7b,%xmm29,-0x204\(%rdx\
[all...] |
| x86-64-evex-lig256-intel.d | 12 [ ]*[a-f0-9]+: 62 01 97 27 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28
13 [ ]*[a-f0-9]+: 62 01 97 a7 58 f4 vaddsd xmm30\{k7\}\{z\},xmm29,xmm28
14 [ ]*[a-f0-9]+: 62 01 97 17 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rn-sae\}
15 [ ]*[a-f0-9]+: 62 01 97 57 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{ru-sae\}
16 [ ]*[a-f0-9]+: 62 01 97 37 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rd-sae\}
17 [ ]*[a-f0-9]+: 62 01 97 77 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rz-sae\}
18 [ ]*[a-f0-9]+: 62 61 97 27 58 31 vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rcx\]
19 [ ]*[a-f0-9]+: 62 21 97 27 58 b4 f0 23 01 00 00 vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rax\+r14\*8\+0x123\]
20 [ ]*[a-f0-9]+: 62 61 97 27 58 72 7f vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rdx\+0x3f8\
[all...] |
| x86-64-evex-lig256.d | 12 [ ]*[a-f0-9]+: 62 01 97 27 58 f4 vaddsd %xmm28,%xmm29,%xmm30\{%k7\}
13 [ ]*[a-f0-9]+: 62 01 97 a7 58 f4 vaddsd %xmm28,%xmm29,%xmm30\{%k7\}\{z\}
14 [ ]*[a-f0-9]+: 62 01 97 17 58 f4 vaddsd \{rn-sae\},%xmm28,%xmm29,%xmm30\{%k7\}
15 [ ]*[a-f0-9]+: 62 01 97 57 58 f4 vaddsd \{ru-sae\},%xmm28,%xmm29,%xmm30\{%k7\}
16 [ ]*[a-f0-9]+: 62 01 97 37 58 f4 vaddsd \{rd-sae\},%xmm28,%xmm29,%xmm30\{%k7\}
17 [ ]*[a-f0-9]+: 62 01 97 77 58 f4 vaddsd \{rz-sae\},%xmm28,%xmm29,%xmm30\{%k7\}
18 [ ]*[a-f0-9]+: 62 61 97 27 58 31 vaddsd \(%rcx\),%xmm29,%xmm30\{%k7\}
19 [ ]*[a-f0-9]+: 62 21 97 27 58 b4 f0 23 01 00 00 vaddsd 0x123\(%rax,%r14,8\),%xmm29,%xmm30\{%k7\}
20 [ ]*[a-f0-9]+: 62 61 97 27 58 72 7f vaddsd 0x3f8\(%rdx\),%xmm29,%xmm30\{%k7\
[all...] |
| x86-64-evex-lig512-intel.d | 12 [ ]*[a-f0-9]+: 62 01 97 47 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28
13 [ ]*[a-f0-9]+: 62 01 97 c7 58 f4 vaddsd xmm30\{k7\}\{z\},xmm29,xmm28
14 [ ]*[a-f0-9]+: 62 01 97 17 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rn-sae\}
15 [ ]*[a-f0-9]+: 62 01 97 57 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{ru-sae\}
16 [ ]*[a-f0-9]+: 62 01 97 37 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rd-sae\}
17 [ ]*[a-f0-9]+: 62 01 97 77 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rz-sae\}
18 [ ]*[a-f0-9]+: 62 61 97 47 58 31 vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rcx\]
19 [ ]*[a-f0-9]+: 62 21 97 47 58 b4 f0 23 01 00 00 vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rax\+r14\*8\+0x123\]
20 [ ]*[a-f0-9]+: 62 61 97 47 58 72 7f vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rdx\+0x3f8\
[all...] |
| x86-64-evex-lig512.d | 12 [ ]*[a-f0-9]+: 62 01 97 47 58 f4 vaddsd %xmm28,%xmm29,%xmm30\{%k7\}
13 [ ]*[a-f0-9]+: 62 01 97 c7 58 f4 vaddsd %xmm28,%xmm29,%xmm30\{%k7\}\{z\}
14 [ ]*[a-f0-9]+: 62 01 97 17 58 f4 vaddsd \{rn-sae\},%xmm28,%xmm29,%xmm30\{%k7\}
15 [ ]*[a-f0-9]+: 62 01 97 57 58 f4 vaddsd \{ru-sae\},%xmm28,%xmm29,%xmm30\{%k7\}
16 [ ]*[a-f0-9]+: 62 01 97 37 58 f4 vaddsd \{rd-sae\},%xmm28,%xmm29,%xmm30\{%k7\}
17 [ ]*[a-f0-9]+: 62 01 97 77 58 f4 vaddsd \{rz-sae\},%xmm28,%xmm29,%xmm30\{%k7\}
18 [ ]*[a-f0-9]+: 62 61 97 47 58 31 vaddsd \(%rcx\),%xmm29,%xmm30\{%k7\}
19 [ ]*[a-f0-9]+: 62 21 97 47 58 b4 f0 23 01 00 00 vaddsd 0x123\(%rax,%r14,8\),%xmm29,%xmm30\{%k7\}
20 [ ]*[a-f0-9]+: 62 61 97 47 58 72 7f vaddsd 0x3f8\(%rdx\),%xmm29,%xmm30\{%k7\
[all...] |
| avx2-intel.d | 11 [ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd ymm6,ymm4,YMMWORD PTR \[ecx\]
12 [ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd YMMWORD PTR \[ecx\],ymm6,ymm4
13 [ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq ymm6,ymm4,YMMWORD PTR \[ecx\]
14 [ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq YMMWORD PTR \[ecx\],ymm6,ymm4
15 [ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd ymm2,ymm6,0x7
16 [ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd ymm6,YMMWORD PTR \[ecx\],0x7
17 [ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq ymm2,ymm6,0x7
18 [ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq ymm6,YMMWORD PTR \[ecx\],0x7
19 [ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd ymm2,ymm6,ymm4
20 [ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd ymm2,ymm6,YMMWORD PTR \[ecx\
[all...] |
| avx2.d | 10 [ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd \(%ecx\),%ymm4,%ymm6
11 [ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd %ymm4,%ymm6,\(%ecx\)
12 [ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq \(%ecx\),%ymm4,%ymm6
13 [ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq %ymm4,%ymm6,\(%ecx\)
14 [ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd \$0x7,%ymm6,%ymm2
15 [ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd \$0x7,\(%ecx\),%ymm6
16 [ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq \$0x7,%ymm6,%ymm2
17 [ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq \$0x7,\(%ecx\),%ymm6
18 [ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd %ymm4,%ymm6,%ymm2
19 [ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd \(%ecx\),%ymm6,%ymm
[all...] |
| x86-64-avx2-intel.d | 11 [ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd ymm6,ymm4,YMMWORD PTR \[rcx\]
12 [ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd YMMWORD PTR \[rcx\],ymm6,ymm4
13 [ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq ymm6,ymm4,YMMWORD PTR \[rcx\]
14 [ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq YMMWORD PTR \[rcx\],ymm6,ymm4
15 [ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd ymm2,ymm6,0x7
16 [ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd ymm6,YMMWORD PTR \[rcx\],0x7
17 [ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq ymm2,ymm6,0x7
18 [ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq ymm6,YMMWORD PTR \[rcx\],0x7
19 [ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd ymm2,ymm6,ymm4
20 [ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd ymm2,ymm6,YMMWORD PTR \[rcx\
[all...] |
| x86-64-avx2.d | 10 [ ]*[a-f0-9]+: c4 e2 5d 8c 31 vpmaskmovd \(%rcx\),%ymm4,%ymm6
11 [ ]*[a-f0-9]+: c4 e2 4d 8e 21 vpmaskmovd %ymm4,%ymm6,\(%rcx\)
12 [ ]*[a-f0-9]+: c4 e2 dd 8c 31 vpmaskmovq \(%rcx\),%ymm4,%ymm6
13 [ ]*[a-f0-9]+: c4 e2 cd 8e 21 vpmaskmovq %ymm4,%ymm6,\(%rcx\)
14 [ ]*[a-f0-9]+: c4 e3 fd 01 d6 07 vpermpd \$0x7,%ymm6,%ymm2
15 [ ]*[a-f0-9]+: c4 e3 fd 01 31 07 vpermpd \$0x7,\(%rcx\),%ymm6
16 [ ]*[a-f0-9]+: c4 e3 fd 00 d6 07 vpermq \$0x7,%ymm6,%ymm2
17 [ ]*[a-f0-9]+: c4 e3 fd 00 31 07 vpermq \$0x7,\(%rcx\),%ymm6
18 [ ]*[a-f0-9]+: c4 e2 4d 36 d4 vpermd %ymm4,%ymm6,%ymm2
19 [ ]*[a-f0-9]+: c4 e2 4d 36 11 vpermd \(%rcx\),%ymm6,%ymm
[all...] |
| /art/runtime/interpreter/mterp/mips64/ |
| fbinop.S | 6 * form: <op> f0, f0, f1
12 GET_VREG_FLOAT f0, a2 # f0 <- vBB
14 $instr # f0 <- f0 op f1
17 SET_VREG_FLOAT f0, a4 # vAA <- f0
|
| fbinop2addr.S | 6 * form: <op> f0, f0, f1
11 GET_VREG_FLOAT f0, a2 # f0 <- vA
13 $instr # f0 <- f0 op f1
16 SET_VREG_FLOAT f0, a2 # vA <- f0
|
