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  /art/test/115-native-bridge/src/
NativeBridgeMain.java 112 native static short shortMethod(short s1, short s2, short s3, short s4, short s5, short s6, short s7,
  /external/llvm/test/MC/AArch64/
arm64-memory.s 13 ldr s7, [sp, #4]
48 ; CHECK: ldr s7, [sp, #4] ; encoding: [0xe7,0x07,0x40,0xbd]
86 str s7, [sp, #4]
98 ; CHECK: str s7, [sp, #4] ; encoding: [0xe7,0x07,0x00,0xbd]
115 ldur s7, [sp, #4]
130 ; CHECK: ldur s7, [sp, #4] ; encoding: [0xe7,0x43,0x40,0xbc]
146 stur s7, [sp, #4]
161 ; CHECK: stur s7, [sp, #4] ; encoding: [0xe7,0x43,0x00,0xbc]
215 ldr s7, [x0, #4]!
223 str s7, [x0, #-4]
    [all...]
  /external/llvm/test/MC/Mips/eva/
invalid_R6.s 10 lwle $s7,-256($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
11 lwle $s7,-176($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit signed offset
  /external/llvm/test/MC/Mips/mips3/
invalid-mips5.s 10 ldxc1 $f8,$s7($t3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
21 movn.s $f12,$f0,$s7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
mips32-dspr2.d 37 0+006c <[^>]*> 02d70019 multu s6,s7
38 0+0070 <[^>]*> 7f19bb51 precr\.qb\.ph s7,t8,t9
mipsr6@mips32-dspr2.d 38 0+006c <[^>]*> 02d70019 multu \$ac0,s6,s7
39 0+0070 <[^>]*> 7f19bb51 precr\.qb\.ph s7,t8,t9
  /external/llvm/test/MC/Mips/mips32r2/
valid.s 8 add $s7,$s2,$a1
17 and $s7,$v0,$12
88 ldxc1 $f8,$s7($15)
122 movn.s $f12,$f0,$s7
129 msub $s7,$k1
185 slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a]
193 sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
194 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
195 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
  /external/llvm/test/MC/Mips/mips32r3/
valid.s 8 add $s7,$s2,$a1
17 and $s7,$v0,$12
88 ldxc1 $f8,$s7($15)
122 movn.s $f12,$f0,$s7
129 msub $s7,$k1
185 slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a]
193 sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
194 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
195 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
  /external/llvm/test/MC/Mips/mips32r5/
valid.s 8 add $s7,$s2,$a1
17 and $s7,$v0,$12
89 ldxc1 $f8,$s7($15)
123 movn.s $f12,$f0,$s7
130 msub $s7,$k1
186 slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a]
194 sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
195 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
196 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
  /external/llvm/test/MC/Mips/mips4/
valid.s 8 add $s7,$s2,$a1
17 and $s7,$v0,$12
82 dmult $s7,$9
132 ldxc1 $f8,$s7($15)
163 movn.s $f12,$f0,$s7
213 slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a]
221 sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
222 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
223 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
  /external/llvm/test/MC/Mips/mips5/
valid.s 8 add $s7,$s2,$a1
17 and $s7,$v0,$12
82 dmult $s7,$9
132 ldxc1 $f8,$s7($15)
164 movn.s $f12,$f0,$s7
214 slt $s7,$11,$k1 # CHECK: slt $23, $11, $27 # encoding: [0x01,0x7b,0xb8,0x2a]
222 sra $s1,$s7,15 # CHECK: sra $17, $23, 15 # encoding: [0x00,0x17,0x8b,0xc3]
223 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
224 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
  /external/libvpx/libvpx/vpx_dsp/arm/
loopfilter_neon.c 546 uint8x##w##_t *s5, uint8x##w##_t *s6, uint8x##w##_t *s7, \
845 uint8x8_t s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, local
923 uint8x8_t s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, local
1022 uint8x16_t s0, s1, s2, s3, s4, s5, s6, s7; local
1054 uint8x16_t s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, s13, s14, local
    [all...]
  /external/clang/test/CodeGen/
bitfield-2.c 272 // CHECK-RECORD: Record: RecordDecl{{.*}}s7
274 // CHECK-RECORD: LLVMType:%struct.s7 = type { i32, i32, i32, i8, i32, [12 x i8] }
280 struct __attribute__((aligned(16))) s7 { struct
286 int f7_load(struct s7 *a0) {
  /external/clang/test/OpenMP/
for_private_messages.cpp 72 class S7 : public T {
74 S7() : a(0) {}
77 S7(T v) : a(v) {
82 S7 &operator=(S7 &s) {
178 S7<S6<float> > s7(0.0) , s7_0(1.0);
244 s7 = s7_0; // expected-note {{in instantiation of member function 'S7<S6<float> >::operator=' requested here}}
for_simd_private_messages.cpp 72 class S7 : public T {
74 S7() : a(0) {}
77 S7(T v) : a(v) {
82 S7 &operator=(S7 &s) {
171 S7<S6<float> > s7(0.0) , s7_0(1.0);
234 s7 = s7_0; // expected-note {{in instantiation of member function 'S7<S6<float> >::operator=' requested here}}
parallel_for_private_messages.cpp 72 class S7 : public T {
74 S7() : a(0) {}
77 S7(T v) : a(v) {
82 S7 &operator=(S7 &s) {
171 S7<S6<float> > s7(0.0) , s7_0(1.0);
234 s7 = s7_0; // expected-note {{in instantiation of member function 'S7<S6<float> >::operator=' requested here}}
parallel_sections_private_messages.cpp 80 class S7 : public T {
82 S7() : a(0) {}
85 S7(T v) : a(v) {
92 S7 &operator=(S7 &s) {
198 S7<S6<float> > s7(0.0) , s7_0(1.0);
278 s7 = s7_0; // expected-note {{in instantiation of member function 'S7<S6<float> >::operator=' requested here}}
sections_private_messages.cpp 80 class S7 : public T {
82 S7() : a(0) {}
85 S7(T v) : a(v) {
92 S7 &operator=(S7 &s) {
198 S7<S6<float> > s7(0.0) , s7_0(1.0);
278 s7 = s7_0; // expected-note {{in instantiation of member function 'S7<S6<float> >::operator=' requested here}}
simd_private_messages.cpp 68 class S7 : public T {
70 S7() : a(0) {}
73 S7(T v) : a(v) {
78 S7 &operator=(S7 &s) {
148 S7<S6<float> > s7(0.0) , s7_0(1.0);
191 s7 = s7_0; // expected-note {{in instantiation of member function 'S7<S6<float> >::operator=' requested here}}
single_private_messages.cpp 72 class S7 : public T {
74 S7() : a(0) {}
77 S7(T v) : a(v) {
82 S7 &operator=(S7 &s) {
154 S7<S6<float> > s7(0.0) , s7_0(1.0);
200 s7 = s7_0; // expected-note {{in instantiation of member function 'S7<S6<float> >::operator=' requested here}}
target_firstprivate_messages.cpp 65 class S7 : public T {
67 S7() : a(0) {}
70 S7(T v) : a(v) {
75 S7 &operator=(S7 &s) {
149 S7<S6<float> > s7(0.0) , s7_0(1.0);
195 s7 = s7_0; // expected-note {{in instantiation of member function 'S7<S6<float> >::operator=' requested here}}
target_parallel_for_private_messages.cpp 72 class S7 : public T {
74 S7() : a(0) {}
77 S7(T v) : a(v) {
82 S7 &operator=(S7 &s) {
168 S7<S6<float> > s7(0.0) , s7_0(1.0);
228 s7 = s7_0; // expected-note {{in instantiation of member function 'S7<S6<float> >::operator=' requested here}}
target_private_messages.cpp 65 class S7 : public T {
67 S7() : a(0) {}
70 S7(T v) : a(v) {
75 S7 &operator=(S7 &s) {
149 S7<S6<float> > s7(0.0) , s7_0(1.0);
195 s7 = s7_0; // expected-note {{in instantiation of member function 'S7<S6<float> >::operator=' requested here}}
taskloop_private_messages.cpp 72 class S7 : public T {
74 S7() : a(0) {}
77 S7(T v) : a(v) {
82 S7 &operator=(S7 &s) {
178 S7<S6<float> > s7(0.0) , s7_0(1.0);
244 s7 = s7_0; // expected-note {{in instantiation of member function 'S7<S6<float> >::operator=' requested here}}
  /external/libcxx/test/std/strings/basic.string/string.cons/
T_size_size.pass.cpp 183 S s7(s.data(), 2); // calls ctor(const char *, len)
184 assert(s7 == "AB");

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