| /dalvik/dexgen/src/com/android/dexgen/util/ |
| Hex.java | 145 public static String s8(long v) { method in class:Hex
|
| /dalvik/dx/src/com/android/dx/util/ |
| Hex.java | 145 public static String s8(long v) { method in class:Hex
|
| /external/libavc/common/arm/ |
| ih264_iquant_itrans_recon_dc_a9.s | 358 vld2.s8 {d2, d3}, [r1], r3 @load pred plane 1 => d2 &pred palne 2 => d3
359 vld2.s8 {d3, d4}, [r1], r3
361 vld2.s8 {d4, d5}, [r1], r3
362 vld2.s8 {d5, d6}, [r1], r3
|
| /external/llvm/test/MC/ARM/ |
| fullfp16-neg.s | 92 vcvtm.s32.f16 s17, s8
104 vcvtm.u32.f16 s17, s8
|
| neont2-mul-encoding.s | 54 vmull.s8 q8, d16, d17
62 @ CHECK: vmull.s8 q8, d16, d17 @ encoding: [0xc0,0xef,0xa1,0x0c]
|
| /external/smali/util/src/main/java/org/jf/util/ |
| Hex.java | 157 public static String s8(long v) { method in class:Hex
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| vldconst.s | 123 vldr s8, =0xff000002
|
| neon-ldst-es.s | 15 vld3.s8 {d3[],d4[],d5[]},[r10],r12
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| micromips@mips32-dspr2.d | 50 0+009a <[^>]*> 03df e9cd shrav\.qb sp,s8,ra
51 0+009e <[^>]*> 03e0 f5cd shrav_r\.qb s8,ra,zero
|
| /external/llvm/test/MC/Mips/mips3/ |
| invalid-mips4.s | 11 lwxc1 $f12,$s1($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/icu/icu4c/source/test/intltest/ |
| strcase.cpp | 626 std::string s8; local
627 s16.toUTF8String(s8);
631 s8.data(), s8.length(), &errorCode);
649 s8.data(), s8.length(), &errorCode);
[all...] |
| usettest.cpp | 2378 char *s8=utf8; local
2445 const char *s8=fSet.utf8+nextUTF8Start; local
2697 const char *s8; local
2718 const char *s8; local
2800 const char *s8; local
2820 const char *s8; local
3262 uint8_t s8[3000]; local
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_intra_pred_filters_chroma_mode_19_to_25.s | 256 vmull.s8 q1,d3,d0 @pos = ((row + 1) * intra_pred_ang)
260 vshl.s8 d5,d5,#1
385 vmull.s8 q1,d5,d0 @pos = ((row + 1) * intra_pred_ang)
389 vshl.s8 d3,d3,#1
448 vmull.s8 q1,d5,d0 @pos = ((row + 1) * intra_pred_ang)
499 vshl.s8 d3,d3,#1
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips32r2.s | 15 di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
22 lwxc1 $f12,$s1($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
30 mfhc1 $s8,$f24 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 63 di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00]
100 lwxc1 $f12,$s1($s8)
109 mfhc1 $s8,$f24
115 move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
134 mtc1 $s8,$f9
245 xor $s2,$a0,$s8
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| valid.s | 63 di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00]
100 lwxc1 $f12,$s1($s8)
109 mfhc1 $s8,$f24
115 move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
134 mtc1 $s8,$f9
245 xor $s2,$a0,$s8
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| valid.s | 63 di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00]
101 lwxc1 $f12,$s1($s8)
110 mfhc1 $s8,$f24
116 move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
135 mtc1 $s8,$f9
246 xor $s2,$a0,$s8
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 79 di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00]
169 lwxc1 $f12,$s1($s8)
177 mfhc1 $s8,$f24
185 move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
203 mtc1 $s8,$f9
248 sdl $a3,-20961($s8)
319 xor $s2,$a0,$s8
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 79 di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00]
169 lwxc1 $f12,$s1($s8)
177 mfhc1 $s8,$f24
185 move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
203 mtc1 $s8,$f9
248 sdl $a3,-20961($s8)
319 xor $s2,$a0,$s8
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| valid.s | 79 di $s8 # CHECK: di $fp # encoding: [0x41,0x7e,0x60,0x00]
170 lwxc1 $f12,$s1($s8)
178 mfhc1 $s8,$f24
186 move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
204 mtc1 $s8,$f9
249 sdl $a3,-20961($s8)
320 xor $s2,$a0,$s8
|
| /external/libvpx/libvpx/vpx_dsp/ |
| inv_txfm.c | 387 tran_high_t s0, s1, s2, s3, s4, s5, s6, s7, s8; local
421 s8 = x8 * cospi_17_64 + x9 * cospi_15_64;
430 x0 = WRAPLOW(dct_const_round_shift(s0 + s8));
438 x8 = WRAPLOW(dct_const_round_shift(s0 - s8));
456 s8 = x8 * cospi_4_64 + x9 * cospi_28_64;
473 x8 = WRAPLOW(dct_const_round_shift(s8 + s12));
477 x12 = WRAPLOW(dct_const_round_shift(s8 - s12));
491 s8 = x8;
508 x8 = WRAPLOW(s8 + s10);
510 x10 = WRAPLOW(s8 - s10)
1696 tran_high_t s0, s1, s2, s3, s4, s5, s6, s7, s8; local
[all...] |
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 145 lwxc1 $f12,$s1($s8)
156 move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
172 mtc1 $s8,$f9
205 sdl $a3,-20961($s8)
272 xor $s2,$a0,$s8
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 146 lwxc1 $f12,$s1($s8)
157 move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
173 mtc1 $s8,$f9
206 sdl $a3,-20961($s8)
274 xor $s2,$a0,$s8
|
| /art/runtime/arch/mips/ |
| quick_entrypoints_mips.S | 34 * Callee-save: $s0-$s8 + $gp + $ra, 11 total + 1 word for Method*
50 sw $s8, 88($sp)
93 * callee-save: $s2-$s8 + $gp + $ra, 9 total + 2 words padding + 1 word to hold Method*
109 sw $s8, 40($sp)
141 lw $s8, 40($sp)
170 * callee-save: $a1-$a3, $t0-$t1, $s2-$s8, $gp, $ra, $f8-$f19
184 sw $s8, 104($sp)
222 * callee-save: $a1-$a3, $t0-$t1, $s2-$s8, $gp, $ra, $f8-$f19
242 * callee-save: $a1-$a3, $t0-$t1, $s2-$s8, $gp, $ra, $f8-$f19
262 lw $s8, 104($sp
[all...] |
| /external/llvm/lib/Target/Hexagon/AsmParser/ |
| HexagonAsmParser.cpp | 1787 int s8 = Hi_32(Value); local
1812 int s8 = Value; local
1826 int s8 = Value; local
[all...] |
