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/external/autotest/client/site_tests/touch_MouseScroll/gestures/
right_fast	`6 E: 1432678477.026908 0001 0110 1 29 E: 1432678477.276388 0001 0110 2 31 E: 1432678477.309386 0001 0110 2 33 E: 1432678477.342392 0001 0110 2 35 E: 1432678477.375388 0001 0110 2 37 E: 1432678477.408391 0001 0110 2 39 E: 1432678477.441387 0001 0110 2 41 E: 1432678477.474392 0001 0110 2 44 E: 1432678477.474868 0001 0110 0`
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-elf/
loadaddr3a.d	`7 LOAD +0x000000 0x000000000 0x000000000 0x00110 0x00110 R E 0x.*`
/external/pdfium/third_party/libtiff/
t4.h	`96 { 8, 0x16, 37 }, /* 0001 0110 / 126 { 7, 0x37, 256 }, / 0110 111 / 127 { 8, 0x36, 320 }, / 0011 0110 / 129 { 8, 0x64, 448 }, / 0110 0100 / 130 { 8, 0x65, 512 }, / 0110 0101 / 131 { 8, 0x68, 576 }, / 0110 1000 / 132 { 8, 0x67, 640 }, / 0110 0111 / 133 { 9, 0xCC, 704 }, / 0110 0110 0 / 134 { 9, 0xCD, 768 }, / 0110 0110 1 * [all...]`
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/hppa/parse/
stringer.s	`9 .STRING "\0110x123"`
/external/icu/android_icu4j/src/main/java/android/icu/util/
IslamicCalendar.java	380 //* 1303 -1307 / "0110 1101 0100", "0110 1110 1010", "0011 0110 1100", "1010 1010 1101", "0101 0101 0101", 382 // 1308 -1312 / "0110 1010 1001", "0111 1001 0010", "1011 1010 1001", "0101 1101 0100", "1010 1101 1010", 384 // 1313 -1317 / "0101 0101 1100", "1101 0010 1101", "0110 1001 0101", "0111 0100 1010", "1011 0101 0100", 386 // 1318 -1322 / "1011 0110 1010", "0101 1010 1101", "0100 1010 1110", "1010 0100 1111", "0101 0001 0111", 388 // 1323 -1327 / "0110 1000 1011", "0110 1010 0101", "1010 1101 0101", "0010 1101 0110", "1001 0101 1011", 390 // 1328 -1332 */ "0100 1001 1101", "1010 0100 1101", "1101 0010 0110", "1101 1001 0101", "0101 1010 1100" [all...]
/external/icu/icu4c/source/i18n/
islamcal.cpp	96 //* 1303 -1307 / "0110 1101 0100", "0110 1110 1010", "0011 0110 1100", "1010 1010 1101", "0101 0101 0101", 98 // 1308 -1312 / "0110 1010 1001", "0111 1001 0010", "1011 1010 1001", "0101 1101 0100", "1010 1101 1010", 100 // 1313 -1317 / "0101 0101 1100", "1101 0010 1101", "0110 1001 0101", "0111 0100 1010", "1011 0101 0100", 102 // 1318 -1322 / "1011 0110 1010", "0101 1010 1101", "0100 1010 1110", "1010 0100 1111", "0101 0001 0111", 104 // 1323 -1327 / "0110 1000 1011", "0110 1010 0101", "1010 1101 0101", "0010 1101 0110", "1001 0101 1011", 106 // 1328 -1332 */ "0100 1001 1101", "1010 0100 1101", "1101 0010 0110", "1101 1001 0101", "0101 1010 1100" [all...]
/toolchain/binutils/binutils-2.25/opcodes/
rl78-decode.opc	`205 /** 0110 0001 1000 000 add %0, %e1 / 211 /* 0110 0001 1000 0010 add %0, %e1 / 217 /* 0110 0001 0000 1rba add %0, %1 / 223 /* 0110 0001 0000 0reg add %0, %1 / 237 /* 0110 0001 1001 0000 addc %0, %e1 / 240 /* 0110 0001 1001 0010 addc %0, %e1 / 249 /* 0110 0001 0001 1rba addc %0, %1 / 252 /* 0110 0001 0001 0reg addc %0, %1 / 266 /* 0110 0001 0000 1001 addw %0, %e1 / 275 /* 0000 0110 addw %0, %1 * [all...]`
rl78-decode.c	`263 /** 0000 0110 addw %0, %1 / 267 "/* 0000 0110 addw %0, %1 /", 669 /* 0010 0110 subw %0, %1 / 673 "/* 0010 0110 subw %0, %1 */", [all...]`
rx-decode.opc	`303 /** 0110 0110 immm rdst mov%s #%1, %0 / 364 /* 0110 1111 dsta dstb popm %1-%2 / 367 /* 0110 1110 dsta dstb pushm %1-%2 / 385 /* 0000 0110 mx10 00ss 0001 0000 rsrc rdst xchg %1%S1, %0 / 400 /* 0110 0111 rtsd #%1 / 409 /* 0110 0100 immm rdst and #%1, %0 / 418 /* 0000 0110 mx01 00ss rsrc rdst and %1%S1, %0 / 427 /* 0110 0101 immm rdst or #%1, %0 / 436 /* 0000 0110 mx01 01ss rsrc rdst or %1%S1, %0 * [all...]`
z8kgen.c	42 {"------", 2, 8, "0011 0110 0000 0000", "bpt", 0}, /* Breakpoint used by the simulator. */ 51 {"------", 10, 8, "0011 0110 imm8", "rsvd36", 0}, 84 {"CZSV--", 11, 16, "1011 1011 ssN0 0110 0000 rrrr ddN0 cccc", "cpsir @rd,@rs,rr,cc", 0}, 85 {"CZSV--", 11, 8, "1011 1010 ssN0 0110 0000 rrrr ddN0 cccc", "cpsirb @rd,@rs,rr,cc", 0}, 99 {"CZSV--", 14, 32, "0001 0110 ssN0 dddd", "addl rrd,@rs", 0}, 100 {"CZSV--", 15, 32, "0101 0110 0000 dddd address_src", "addl rrd,address_src", 0}, 101 {"CZSV--", 16, 32, "0101 0110 ssN0 dddd address_src", "addl rrd,address_src(rs)", 0}, 102 {"CZSV--", 14, 32, "0001 0110 0000 dddd imm32", "addl rrd,imm32", 0}, 103 {"CZSV--", 8, 32, "1001 0110 ssss dddd", "addl rrd,rrs", 0}, 110 {"-ZSP--", 7, 8, "0000 0110 ssN0 dddd", "andb rbd,@rs", 0} [all...]
/external/icu/icu4j/main/classes/core/src/com/ibm/icu/util/
IslamicCalendar.java	406 //* 1303 -1307 / "0110 1101 0100", "0110 1110 1010", "0011 0110 1100", "1010 1010 1101", "0101 0101 0101", 408 // 1308 -1312 / "0110 1010 1001", "0111 1001 0010", "1011 1010 1001", "0101 1101 0100", "1010 1101 1010", 410 // 1313 -1317 / "0101 0101 1100", "1101 0010 1101", "0110 1001 0101", "0111 0100 1010", "1011 0101 0100", 412 // 1318 -1322 / "1011 0110 1010", "0101 1010 1101", "0100 1010 1110", "1010 0100 1111", "0101 0001 0111", 414 // 1323 -1327 / "0110 1000 1011", "0110 1010 0101", "1010 1101 0101", "0010 1101 0110", "1001 0101 1011", 416 // 1328 -1332 */ "0100 1001 1101", "1010 0100 1101", "1101 0010 0110", "1101 1001 0101", "0101 1010 1100" [all...]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/
diffexp-ovwr.d	`24 0110 00000000 00000000 00000000 00000000 .*`
rd-v32-b2.d	`26 820f: 0110 bcs 810f <b2>`
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-mmix/
bpo-6m.d	`23 0110 00000000 00000200 00000000 00000300 .*`
/art/compiler/optimizing/
liveness_test.cc	`164 " live out: (0110)\n" 301 " live out: (0110)\n" 304 " live in: (0110)\n" 305 " live out: (0110)\n" 308 " live in: (0110)\n" 309 " live out: (0110)\n" 396 " live out: (0110)\n" 450 " live out: (0110)\n" 453 " live in: (0110)\n" 457 " live in: (0110)\n [all...]`
/external/v8/src/crankshaft/
hydrogen-types.h	`32 V(String, 0x65) /* 0000 0000 0110 0101 / \ 36 V(JSObject, 0x621) / 0000 0110 0010 0001 */ \`
/external/autotest/client/site_tests/touch_MouseScroll/
apple_mouse.prop	`2 I: 0003 05ac 0304 0110`
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/arch/
sh.s	41 exts.b r5,r4 ;!/* 0110nnnnmmmm1110 exts.b <REG_M>,<REG_N>/{"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}, arch_sh_up} 42 exts.w r5,r4 ;!/ 0110nnnnmmmm1111 exts.w <REG_M>,<REG_N>/{"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}, arch_sh_up} 43 extu.b r5,r4 ;!/ 0110nnnnmmmm1100 extu.b <REG_M>,<REG_N>/{"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}, arch_sh_up} 44 extu.w r5,r4 ;!/ 0110nnnnmmmm1101 extu.w <REG_M>,<REG_N>/{"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}, arch_sh_up} 61 mov r5,r4 ;!/ 0110nnnnmmmm0011 mov <REG_M>,<REG_N> /{"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}, arch_sh_up} 68 mov.b @r5+,r4 ;!/ 0110nnnnmmmm0100 mov.b @<REG_M>+,<REG_N>/{"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}, arch_sh_up} 69 mov.b @r5,r4 ;!/ 0110nnnnmmmm0000 mov.b @<REG_M>,<REG_N>/{"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}, arch_sh_up} 81 mov.l @r5+,r4 ;!/ 0110nnnnmmmm0110 mov.l @<REG_M>+,<REG_N>/{"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}, arch_sh_up} 82 mov.l @r5,r4 ;!/ 0110nnnnmmmm0010 mov.l @<REG_M>,<REG_N>/{"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}, arch_sh_up} 91 mov.w @r5+,r4 ;!/ 0110nnnnmmmm0101 mov.w @<REG_M>+,<REG_N>*/{"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}, arch_sh (…) [all...]
sh2.s	54 exts.b r5,r4 ;!/* 0110nnnnmmmm1110 exts.b <REG_M>,<REG_N>/{"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}, arch_sh_up} 55 exts.w r5,r4 ;!/ 0110nnnnmmmm1111 exts.w <REG_M>,<REG_N>/{"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}, arch_sh_up} 56 extu.b r5,r4 ;!/ 0110nnnnmmmm1100 extu.b <REG_M>,<REG_N>/{"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}, arch_sh_up} 57 extu.w r5,r4 ;!/ 0110nnnnmmmm1101 extu.w <REG_M>,<REG_N>/{"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}, arch_sh_up} 74 mov r5,r4 ;!/ 0110nnnnmmmm0011 mov <REG_M>,<REG_N> /{"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}, arch_sh_up} 81 mov.b @r5+,r4 ;!/ 0110nnnnmmmm0100 mov.b @<REG_M>+,<REG_N>/{"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}, arch_sh_up} 82 mov.b @r5,r4 ;!/ 0110nnnnmmmm0000 mov.b @<REG_M>,<REG_N>/{"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}, arch_sh_up} 94 mov.l @r5+,r4 ;!/ 0110nnnnmmmm0110 mov.l @<REG_M>+,<REG_N>/{"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}, arch_sh_up} 95 mov.l @r5,r4 ;!/ 0110nnnnmmmm0010 mov.l @<REG_M>,<REG_N>/{"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}, arch_sh_up} 104 mov.w @r5+,r4 ;!/ 0110nnnnmmmm0101 mov.w @<REG_M>+,<REG_N>*/{"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}, arch_sh (…) [all...]
sh2a-nofpu-or-sh3-nommu.s	49 exts.b r5,r4 ;!/* 0110nnnnmmmm1110 exts.b <REG_M>,<REG_N>/{"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}, arch_sh_up} 50 exts.w r5,r4 ;!/ 0110nnnnmmmm1111 exts.w <REG_M>,<REG_N>/{"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}, arch_sh_up} 51 extu.b r5,r4 ;!/ 0110nnnnmmmm1100 extu.b <REG_M>,<REG_N>/{"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}, arch_sh_up} 52 extu.w r5,r4 ;!/ 0110nnnnmmmm1101 extu.w <REG_M>,<REG_N>/{"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}, arch_sh_up} 69 mov r5,r4 ;!/ 0110nnnnmmmm0011 mov <REG_M>,<REG_N> /{"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}, arch_sh_up} 76 mov.b @r5+,r4 ;!/ 0110nnnnmmmm0100 mov.b @<REG_M>+,<REG_N>/{"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}, arch_sh_up} 77 mov.b @r5,r4 ;!/ 0110nnnnmmmm0000 mov.b @<REG_M>,<REG_N>/{"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}, arch_sh_up} 89 mov.l @r5+,r4 ;!/ 0110nnnnmmmm0110 mov.l @<REG_M>+,<REG_N>/{"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}, arch_sh_up} 90 mov.l @r5,r4 ;!/ 0110nnnnmmmm0010 mov.l @<REG_M>,<REG_N>/{"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}, arch_sh_up} 99 mov.w @r5+,r4 ;!/ 0110nnnnmmmm0101 mov.w @<REG_M>+,<REG_N>*/{"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}, arch_sh (…) [all...]
sh2a-nofpu-or-sh4-nommu-nofpu.s	48 exts.b r5,r4 ;!/* 0110nnnnmmmm1110 exts.b <REG_M>,<REG_N>/{"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}, arch_sh_up} 49 exts.w r5,r4 ;!/ 0110nnnnmmmm1111 exts.w <REG_M>,<REG_N>/{"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}, arch_sh_up} 50 extu.b r5,r4 ;!/ 0110nnnnmmmm1100 extu.b <REG_M>,<REG_N>/{"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}, arch_sh_up} 51 extu.w r5,r4 ;!/ 0110nnnnmmmm1101 extu.w <REG_M>,<REG_N>/{"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}, arch_sh_up} 68 mov r5,r4 ;!/ 0110nnnnmmmm0011 mov <REG_M>,<REG_N> /{"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}, arch_sh_up} 75 mov.b @r5+,r4 ;!/ 0110nnnnmmmm0100 mov.b @<REG_M>+,<REG_N>/{"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}, arch_sh_up} 76 mov.b @r5,r4 ;!/ 0110nnnnmmmm0000 mov.b @<REG_M>,<REG_N>/{"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}, arch_sh_up} 88 mov.l @r5+,r4 ;!/ 0110nnnnmmmm0110 mov.l @<REG_M>+,<REG_N>/{"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}, arch_sh_up} 89 mov.l @r5,r4 ;!/ 0110nnnnmmmm0010 mov.l @<REG_M>,<REG_N>/{"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}, arch_sh_up} 98 mov.w @r5+,r4 ;!/ 0110nnnnmmmm0101 mov.w @<REG_M>+,<REG_N>*/{"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}, arch_sh (…) [all...]
sh2a-or-sh3e.s	48 exts.b r5,r4 ;!/* 0110nnnnmmmm1110 exts.b <REG_M>,<REG_N>/{"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}, arch_sh_up} 49 exts.w r5,r4 ;!/ 0110nnnnmmmm1111 exts.w <REG_M>,<REG_N>/{"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}, arch_sh_up} 50 extu.b r5,r4 ;!/ 0110nnnnmmmm1100 extu.b <REG_M>,<REG_N>/{"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}, arch_sh_up} 51 extu.w r5,r4 ;!/ 0110nnnnmmmm1101 extu.w <REG_M>,<REG_N>/{"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}, arch_sh_up} 72 mov r5,r4 ;!/ 0110nnnnmmmm0011 mov <REG_M>,<REG_N> /{"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}, arch_sh_up} 79 mov.b @r5+,r4 ;!/ 0110nnnnmmmm0100 mov.b @<REG_M>+,<REG_N>/{"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}, arch_sh_up} 80 mov.b @r5,r4 ;!/ 0110nnnnmmmm0000 mov.b @<REG_M>,<REG_N>/{"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}, arch_sh_up} 92 mov.l @r5+,r4 ;!/ 0110nnnnmmmm0110 mov.l @<REG_M>+,<REG_N>/{"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}, arch_sh_up} 93 mov.l @r5,r4 ;!/ 0110nnnnmmmm0010 mov.l @<REG_M>,<REG_N>/{"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}, arch_sh_up} 102 mov.w @r5+,r4 ;!/ 0110nnnnmmmm0101 mov.w @<REG_M>+,<REG_N>*/{"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}, arch_sh (…) [all...]
sh2e.s	83 exts.b r5,r4 ;!/* 0110nnnnmmmm1110 exts.b <REG_M>,<REG_N>/{"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}, arch_sh_up} 84 exts.w r5,r4 ;!/ 0110nnnnmmmm1111 exts.w <REG_M>,<REG_N>/{"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}, arch_sh_up} 85 extu.b r5,r4 ;!/ 0110nnnnmmmm1100 extu.b <REG_M>,<REG_N>/{"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}, arch_sh_up} 86 extu.w r5,r4 ;!/ 0110nnnnmmmm1101 extu.w <REG_M>,<REG_N>/{"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}, arch_sh_up} 103 mov r5,r4 ;!/ 0110nnnnmmmm0011 mov <REG_M>,<REG_N> /{"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}, arch_sh_up} 110 mov.b @r5+,r4 ;!/ 0110nnnnmmmm0100 mov.b @<REG_M>+,<REG_N>/{"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}, arch_sh_up} 111 mov.b @r5,r4 ;!/ 0110nnnnmmmm0000 mov.b @<REG_M>,<REG_N>/{"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}, arch_sh_up} 123 mov.l @r5+,r4 ;!/ 0110nnnnmmmm0110 mov.l @<REG_M>+,<REG_N>/{"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}, arch_sh_up} 124 mov.l @r5,r4 ;!/ 0110nnnnmmmm0010 mov.l @<REG_M>,<REG_N>/{"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}, arch_sh_up} 133 mov.w @r5+,r4 ;!/ 0110nnnnmmmm0101 mov.w @<REG_M>+,<REG_N>*/{"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}, arch_sh (…) [all...]
sh3-nommu.s	59 exts.b r5,r4 ;!/* 0110nnnnmmmm1110 exts.b <REG_M>,<REG_N>/{"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}, arch_sh_up} 60 exts.w r5,r4 ;!/ 0110nnnnmmmm1111 exts.w <REG_M>,<REG_N>/{"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}, arch_sh_up} 61 extu.b r5,r4 ;!/ 0110nnnnmmmm1100 extu.b <REG_M>,<REG_N>/{"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}, arch_sh_up} 62 extu.w r5,r4 ;!/ 0110nnnnmmmm1101 extu.w <REG_M>,<REG_N>/{"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}, arch_sh_up} 79 mov r5,r4 ;!/ 0110nnnnmmmm0011 mov <REG_M>,<REG_N> /{"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}, arch_sh_up} 86 mov.b @r5+,r4 ;!/ 0110nnnnmmmm0100 mov.b @<REG_M>+,<REG_N>/{"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}, arch_sh_up} 87 mov.b @r5,r4 ;!/ 0110nnnnmmmm0000 mov.b @<REG_M>,<REG_N>/{"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}, arch_sh_up} 99 mov.l @r5+,r4 ;!/ 0110nnnnmmmm0110 mov.l @<REG_M>+,<REG_N>/{"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}, arch_sh_up} 100 mov.l @r5,r4 ;!/ 0110nnnnmmmm0010 mov.l @<REG_M>,<REG_N>/{"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}, arch_sh_up} 109 mov.w @r5+,r4 ;!/ 0110nnnnmmmm0101 mov.w @<REG_M>+,<REG_N>*/{"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}, arch_sh (…) [all...]
sh3.s	48 exts.b r5,r4 ;!/* 0110nnnnmmmm1110 exts.b <REG_M>,<REG_N>/{"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}, arch_sh_up} 49 exts.w r5,r4 ;!/ 0110nnnnmmmm1111 exts.w <REG_M>,<REG_N>/{"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}, arch_sh_up} 50 extu.b r5,r4 ;!/ 0110nnnnmmmm1100 extu.b <REG_M>,<REG_N>/{"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}, arch_sh_up} 51 extu.w r5,r4 ;!/ 0110nnnnmmmm1101 extu.w <REG_M>,<REG_N>/{"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}, arch_sh_up} 74 mov r5,r4 ;!/ 0110nnnnmmmm0011 mov <REG_M>,<REG_N> /{"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}, arch_sh_up} 81 mov.b @r5+,r4 ;!/ 0110nnnnmmmm0100 mov.b @<REG_M>+,<REG_N>/{"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}, arch_sh_up} 82 mov.b @r5,r4 ;!/ 0110nnnnmmmm0000 mov.b @<REG_M>,<REG_N>/{"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}, arch_sh_up} 94 mov.l @r5+,r4 ;!/ 0110nnnnmmmm0110 mov.l @<REG_M>+,<REG_N>/{"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}, arch_sh_up} 95 mov.l @r5,r4 ;!/ 0110nnnnmmmm0010 mov.l @<REG_M>,<REG_N>/{"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}, arch_sh_up} 104 mov.w @r5+,r4 ;!/ 0110nnnnmmmm0101 mov.w @<REG_M>+,<REG_N>*/{"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}, arch_sh (…) [all...]

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