| /toolchain/binutils/binutils-2.25/ld/emulparams/ |
| elf32btsmip.sh | 13 # referred to from the latter with the microMIPS ADDIUPC instruction
|
| /external/llvm/test/MC/Mips/ |
| micromips-alu-instructions.s | 41 # CHECK-EL: addiupc $2, 20 # encoding: [0x00,0x79,0x05,0x00]
42 # CHECK-EL: addiupc $7, 16777212 # encoding: [0xbf,0x7b,0xff,0xff]
43 # CHECK-EL: addiupc $7, -16777216 # encoding: [0xc0,0x7b,0x00,0x00]
84 # CHECK-EB: addiupc $2, 20 # encoding: [0x79,0x00,0x00,0x05]
85 # CHECK-EB: addiupc $7, 16777212 # encoding: [0x7b,0xbf,0xff,0xff]
86 # CHECK-EB: addiupc $7, -16777216 # encoding: [0x7b,0xc0,0x00,0x00]
125 addiupc $2, 20
126 addiupc $7, 16777212
127 addiupc $7, -16777216
|
| micromips-invalid.s | 38 addiupc $7, 16777216 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
39 addiupc $6, -16777220 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
40 addiupc $3, 3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| relocations.s | 14 # CHECK-FIXUP: addiupc $2, bar # encoding: [0x78,0b01000AAA,A,A]
40 addiupc $2,bar
|
| valid.s | 7 addiupc $4, 100 # CHECK: addiupc $4, 100 # encoding: [0x78,0x80,0x00,0x19]
[all...] |
| /external/llvm/test/MC/Mips/micromips64r6/ |
| relocations.s | 14 # CHECK-FIXUP: addiupc $2, bar # encoding: [0x78,0b01000AAA,A,A]
44 addiupc $2,bar
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| relocations.s | 8 # CHECK-FIXUP: addiupc $2, bar # encoding: [0xec,0b01000AAA,A,A]
60 addiupc $2,bar
|
| valid.s | 19 addiupc $4, 100 # CHECK: addiupc $4, 100 # encoding: [0xec,0x80,0x00,0x19]
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| relocations.s | 8 # CHECK-FIXUP: addiupc $2, bar # encoding: [0xec,0b01000AAA,A,A]
65 addiupc $2,bar
|
| valid.s | 18 addiupc $4, 100 # CHECK: addiupc $4, 100 # encoding: [0xec,0x80,0x00,0x19]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| r6.s | 248 addiupc $4, (-262144 << 2)
249 addiupc $4, (262143 << 2)
|
| micromips.s | [all...] |
| /external/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
| valid-el.txt | 168 0x00 0x79 0x05 0x00 # CHECK: addiupc $2, 20
169 0xbf 0x7b 0xff 0xff # CHECK: addiupc $7, 16777212
170 0xc0 0x7b 0x00 0x00 # CHECK: addiupc $7, -16777216
|
| valid.txt | 168 0x79 0x00 0x00 0x05 # CHECK: addiupc $2, 20
169 0x7b 0xbf 0xff 0xff # CHECK: addiupc $7, 16777212
170 0x7b 0xc0 0x00 0x00 # CHECK: addiupc $7, -16777216
|
| /art/compiler/utils/mips/ |
| assembler_mips32r6_test.cc | 312 TEST_F(AssemblerMIPS32r6Test, Addiupc) {
313 // The comment from the Lwpc() test applies to this Addiupc() test as well.
315 DriverStr(RepeatRIb(&mips::MipsAssembler::Addiupc, 19, code), "Addiupc");
|
| assembler_mips.h | 328 void Addiupc(Register rs, uint32_t imm19); // R6
[all...] |
| /art/disassembler/ |
| disassembler_mips.cc | 344 { kITypeMask | (0x3 << 19), (59u << kOpcodeShift) | (0 << 19), "addiupc", "Sp" },
583 case 'p': // 19-bit offset in addiupc.
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips32r6InstrInfo.td | 285 class ADDIUPC_DESC : PCREL_DESC_BASE<"addiupc", GPR32Opnd, simm19_lsl2,
743 def ADDIUPC : R6MMR6Rel, ADDIUPC_ENC, ADDIUPC_DESC, ISA_MIPS32R6;
[all...] |
| /external/v8/src/mips/ |
| disasm-mips.cc | [all...] |
| /external/kernel-headers/original/uapi/asm-mips/asm/ |
| inst.h | 913 struct mm_a_format { /* ADDIUPC format (microMIPS) */
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| valid-mips32r6-el.txt | 3 0x19 0x00 0x80 0xec # CHECK: addiupc $4, 100
|
| valid-mips32r6.txt | 188 0xec 0x80 0x00 0x19 # CHECK: addiupc $4, 100
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| valid-mips64r6-el.txt | 3 0x19 0x00 0x80 0xec # CHECK: addiupc $4, 100
|
| valid-mips64r6.txt | 213 0xec 0x80 0x00 0x19 # CHECK: addiupc $4, 100
|
| /art/compiler/utils/mips64/ |
| assembler_mips64.h | 544 void Addiupc(GpuRegister rs, uint32_t imm19);
[all...] |
