| /external/llvm/test/CodeGen/ARM/ |
| argaddr.ll | 6 %b_addr = alloca i32 ; <i32*> [#uses=2]
11 store i32 %b, i32* %b_addr
15 call void @g( i32* %a_addr, i32* %b_addr, i32* %c_addr, i32* %d_addr, i32* %e_addr )
|
| ifcvt4.ll | 12 %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
18 %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
21 %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
25 %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
26 %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
31 %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| argaddr.ll | 6 %b_addr = alloca i32 ; <i32*> [#uses=2]
11 store i32 %b, i32* %b_addr
15 call void @g( i32* %a_addr, i32* %b_addr, i32* %c_addr, i32* %d_addr, i32* %e_addr )
|
| ifcvt4.ll | 14 %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
20 %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
23 %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
27 %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
28 %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
33 %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
|
| /external/llvm/test/CodeGen/X86/ |
| lsr-negative-stride.ll | 25 %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
31 %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
34 %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
38 %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
39 %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
44 %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
|
| inline-asm-R-constraint.ll | 12 %b_addr = alloca i8, align 1 ; <i8*> [#uses=2]
14 store i8 %b, i8* %b_addr
15 call void asm "\09\09movw\09$2, %ax\09\09\0A\09\09divb\09$3\09\09\09\0A\09\09movb\09%al, $0\09\0A\09\09movb %ah, ($4)", "=*m,=*m,*m,*m,R,~{dirflag},~{fpsr},~{flags},~{ax}"(i8* %quotient, i8* %remainder, i16* %a_addr, i8* %b_addr, i8* %remainder) nounwind
|
| 2007-03-16-InlineAsm.ll | 8 %B_addr = alloca i32 ; <i32*> [#uses=1]
13 store i32 %B, i32* %B_addr
|
| xor.ll | 49 %b_addr.0 = phi i32 [ %b, %entry ], [ %tmp8, %bb ]
51 %tmp3 = xor i32 %a_addr.0, %b_addr.0
53 %tmp6 = and i32 %tmp4not, %b_addr.0
72 %b_addr.0 = phi i16 [ %b, %entry ], [ %tmp8, %bb ]
74 %tmp3 = xor i16 %a_addr.0, %b_addr.0
76 %tmp6 = and i16 %tmp4not, %b_addr.0
94 %b_addr.0 = phi i8 [ %b, %entry ], [ %tmp8, %bb ]
96 %tmp3 = xor i8 %a_addr.0, %b_addr.0
98 %tmp6 = and i8 %tmp4not, %b_addr.0
116 %b_addr.0 = phi i32 [ %b, %entry ], [ %tmp8, %bb
[all...] |
| 2010-11-09-MOVLPS.ll | 18 %b_addr = alloca %0*
22 store %0* %b, %0** %b_addr
25 %1 = load %0*, %0** %b_addr, align 64
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| lsr-negative-stride.ll | 25 %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
31 %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
34 %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
38 %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
39 %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
44 %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
|
| iv-users-in-other-loops.ll | 32 %5 = load float* %B_addr.0, align 4 ; <float> [#uses=1]
35 %indvar.next154 = add i64 %B_addr.0.rec, 1 ; <i64> [#uses=1]
39 %B_addr.0.rec = phi i64 [ %indvar.next154, %bb ], [ 0, %entry ] ; <i64> [#uses=14]
41 %indvar146 = trunc i64 %B_addr.0.rec to i32 ; <i32> [#uses=1]
43 %A_addr.0 = getelementptr float* %A, i64 %B_addr.0.rec ; <float*> [#uses=4]
44 %B_addr.0 = getelementptr float* %B, i64 %B_addr.0.rec ; <float*> [#uses=4]
55 %12 = ptrtoint float* %B_addr.0 to i64 ; <i64> [#uses=1]
77 %B_addr.0.sum180 = add i64 %B_addr.0.rec, %A_addr.273.rec ; <i64> [#uses=2
[all...] |
| xor.ll | 49 %b_addr.0 = phi i32 [ %b, %entry ], [ %tmp8, %bb ]
51 %tmp3 = xor i32 %a_addr.0, %b_addr.0
53 %tmp6 = and i32 %tmp4not, %b_addr.0
72 %b_addr.0 = phi i16 [ %b, %entry ], [ %tmp8, %bb ]
74 %tmp3 = xor i16 %a_addr.0, %b_addr.0
76 %tmp6 = and i16 %tmp4not, %b_addr.0
94 %b_addr.0 = phi i8 [ %b, %entry ], [ %tmp8, %bb ]
96 %tmp3 = xor i8 %a_addr.0, %b_addr.0
98 %tmp6 = and i8 %tmp4not, %b_addr.0
116 %b_addr.0 = phi i32 [ %b, %entry ], [ %tmp8, %bb
[all...] |
| inline-asm-R-constraint.ll | 12 %b_addr = alloca i8, align 1 ; <i8*> [#uses=2]
14 store i8 %b, i8* %b_addr
15 call void asm "\09\09movw\09$2, %ax\09\09\0A\09\09divb\09$3\09\09\09\0A\09\09movb\09%al, $0\09\0A\09\09movb %ah, ($4)", "=*m,=*m,*m,*m,R,~{dirflag},~{fpsr},~{flags},~{ax}"(i8* %quotient, i8* %remainder, i16* %a_addr, i8* %b_addr, i8* %remainder) nounwind
|
| 2007-03-16-InlineAsm.ll | 8 %B_addr = alloca i32 ; <i32*> [#uses=1]
13 store i32 %B, i32* %B_addr
|
| /external/llvm/test/CodeGen/XCore/ |
| aliases.ll | 20 ; CHECK-LABEL: b_addr:
23 define i32 *@b_addr() nounwind {
|
| /external/jemalloc/src/ |
| extent.c | 50 uintptr_t b_addr = (uintptr_t)extent_node_addr_get(b); local
52 return ((a_addr > b_addr) - (a_addr < b_addr));
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-ifcvt1-tc.ll | 34 %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
40 %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
43 %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
47 %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
48 %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
53 %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
|
| thumb2-ifcvt1.ll | 35 %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
41 %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
44 %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
48 %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
49 %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
54 %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
| thumb2-ifcvt1-tc.ll | 34 %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
40 %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
43 %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
47 %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
48 %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
53 %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
|
| thumb2-ifcvt1.ll | 35 %b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
41 %tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
44 %tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
48 %tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
49 %tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
54 %tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
|
| /external/swiftshader/third_party/LLVM/test/Transforms/ScalarRepl/ |
| 2007-11-03-bigendian_apint.ll | 7 %b_addr = alloca i16 ; <i16*> [#uses=2]
12 store i16 %b, i16* %b_addr
14 %tmp2 = load i16* %b_addr, align 2 ; <i16> [#uses=1]
|
| /external/ltp/testcases/network/multicast/mc_gethost/ |
| mc_gethost.c | 28 u_char b_addr[IN6ADDRSZ]; local
69 if (inet_pton(af, arg, b_addr)) {
72 printf("[%s]\n", inet_ntop(af, b_addr, p, sizeof p));
73 if (!(host = gethostbyaddr((char *)b_addr, size, af))) {
|
| /external/clang/test/OpenMP/ |
| nvptx_target_firstprivate_codegen.cpp | 50 // TCHECK: [[B_ADDR:%.+]] = alloca [10 x float]*,
58 // TCHECK: store [10 x float]* [[B_IN]], [10 x float]** [[B_ADDR]],
62 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x float]*, [10 x float]** [[B_ADDR]],
135 // TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*,
140 // TCHECK: store [10 x i{{[0-9]+}}]* [[B_IN]], [10 x i{{[0-9]+}}]** [[B_ADDR]],
143 // TCHECK: [[B_ADDR_REF:%.+]] = load [10 x i{{[0-9]+}}]*, [10 x i{{[0-9]+}}]** [[B_ADDR]],
174 // TCHECK: [[B_ADDR:%.+]] = alloca i{{[0-9]+}},
178 // TCHECK: store i{{[0-9]+}} [[B_IN]], i{{[0-9]+}}* [[B_ADDR]],
180 // TCHECK-64: [[B_ADDR_CONV:%.+]] = bitcast i{{[0-9]+}}* [[B_ADDR]] to i{{[0-9]+}}*
205 // TCHECK: [[B_ADDR:%.+]] = alloca [10 x i{{[0-9]+}}]*
[all...] |
| /external/swiftshader/third_party/LLVM/test/Transforms/Inline/ |
| 2007-06-06-NoInline.ll | 29 %b_addr = alloca i32 ; <i32*> [#uses=2]
34 store i32 %b, i32* %b_addr
35 %tmp1 = load i32* %b_addr ; <i32> [#uses=1]
|
| /external/llvm/test/CodeGen/Mips/Fast-ISel/ |
| bswap1.ll | 38 ; ALL: lw $[[B_ADDR:[0-9]+]], %got(b)($[[GOT_ADDR:[0-9]+]])
39 ; ALL: lw $[[B_VAL:[0-9]+]], 0($[[B_ADDR]])
|
