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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/rx/
rx-asm-bad.s 33 .BTGLB bit1
37 bit1 .BTEQU 1,dmem
  /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Include/Omap3530/
Omap3530Timer.h 55 #define TISR_OVF_IT_FLAG_MASK BIT1
65 #define TISR_OVF_IT_FLAG_CLEAR BIT1
69 #define TCLR_AR_AUTORELOAD BIT1
76 #define TIER_OVF_IT_ENABLE BIT1
Omap3530Uart.h 33 #define UART_FCR_RX_FIFO_CLEAR BIT1
38 #define UART_LCR_CHAR_LENGTH_8 (BIT1 | BIT0)
40 #define UART_MCR_RTS_FORCE_ACTIVE BIT1
Omap3530MMCHS.h 23 #define SOFTRESET BIT1
36 #define INIT BIT1
58 #define BCE_ENABLE BIT1
82 #define DATI_MASK BIT1
84 #define DATI_NOT_ALLOWED BIT1
88 #define DTW_4_BIT BIT1
98 #define ICS_MASK BIT1
99 #define ICS BIT1
113 #define TC BIT1
124 #define TC_EN BIT1
    [all...]
Omap3530I2c.h 25 #define NACK_IE BIT1
32 #define NACK BIT1
43 #define STP BIT1
Omap3530Usb.h 30 #define UHH_SYSCONFIG_SOFTRESET BIT1
43 #define UHH_SYSSTATUS_RESETDONE (BIT0 | BIT1 | BIT2)
Omap3530Prcm.h 75 #define CM_FCLKEN_USBHOST_EN_USBHOST2_MASK BIT1
77 #define CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE BIT1
153 #define CM_CLKSEL_PER_CLKSEL_GPT3_SYS BIT1
159 #define RST_GS BIT1
161 #define GLOBAL_SW_RST BIT1
  /device/linaro/bootloader/edk2/Omap35xxPkg/Include/Omap3530/
Omap3530Timer.h 55 #define TISR_OVF_IT_FLAG_MASK BIT1
65 #define TISR_OVF_IT_FLAG_CLEAR BIT1
69 #define TCLR_AR_AUTORELOAD BIT1
76 #define TIER_OVF_IT_ENABLE BIT1
Omap3530Uart.h 33 #define UART_FCR_RX_FIFO_CLEAR BIT1
38 #define UART_LCR_CHAR_LENGTH_8 (BIT1 | BIT0)
40 #define UART_MCR_RTS_FORCE_ACTIVE BIT1
Omap3530MMCHS.h 23 #define SOFTRESET BIT1
36 #define INIT BIT1
58 #define BCE_ENABLE BIT1
82 #define DATI_MASK BIT1
84 #define DATI_NOT_ALLOWED BIT1
88 #define DTW_4_BIT BIT1
98 #define ICS_MASK BIT1
99 #define ICS BIT1
113 #define TC BIT1
124 #define TC_EN BIT1
    [all...]
Omap3530I2c.h 25 #define NACK_IE BIT1
32 #define NACK BIT1
43 #define STP BIT1
Omap3530Usb.h 30 #define UHH_SYSCONFIG_SOFTRESET BIT1
43 #define UHH_SYSSTATUS_RESETDONE (BIT0 | BIT1 | BIT2)
Omap3530Prcm.h 75 #define CM_FCLKEN_USBHOST_EN_USBHOST2_MASK BIT1
77 #define CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE BIT1
153 #define CM_CLKSEL_PER_CLKSEL_GPT3_SYS BIT1
159 #define RST_GS BIT1
161 #define GLOBAL_SW_RST BIT1
  /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/PchRegs/
PchRegsLpss.h 68 #define B_PCH_LPSS_DMAC_STSCMD_MSE BIT1 // Memory Space Enable
86 #define B_PCH_LPSS_DMAC_BAR_TYPE (BIT2 | BIT1) // Type
93 #define B_PCH_LPSS_DMAC_BAR1_TYPE (BIT2 | BIT1) // Type
122 #define B_PCH_LPSS_DMAC_PCS_PS (BIT1 | BIT0) // Power State
153 #define B_PCH_LPSS_I2C_STSCMD_MSE BIT1 // Memory Space Enable
171 #define B_PCH_LPSS_I2C_BAR_TYPE (BIT2 | BIT1) // Type
178 #define B_PCH_LPSS_I2C_BAR1_TYPE (BIT2 | BIT1) // Type
207 #define B_PCH_LPSS_I2C_PCS_PS (BIT1 | BIT0) // Power State
217 #define B_PCH_LPSS_I2C_MEM_RESETS_FUNC BIT1 // Function Clock Domain Reset
240 #define B_PCH_LPSS_PWM_STSCMD_MSE BIT1 // Memory Space Enable
    [all...]
PchRegsPcu.h 84 #define B_PCH_LPC_COMMAND_MSE BIT1 // Memory Space Enable
141 #define B_PCH_LPC_ACPI_BASE_EN BIT1 // Enable Bit
148 #define B_PCH_LPC_PMC_BASE_EN BIT1 // Enable Bit
153 #define B_PCH_LPC_GPIO_BASE_EN BIT1 // Enable Bit
160 #define B_PCH_LPC_IO_BASE_EN BIT1 // Enable Bit
167 #define B_PCH_LPC_ILB_BASE_EN BIT1 // Enable Bit
174 #define B_PCH_LPC_SPI_BASE_EN BIT1 // Enable Bit
181 #define B_PCH_LPC_MPHY_BASE_EN BIT1 // Enable Bit
188 #define B_PCH_LPC_PUNIT_BASE_EN BIT1 // Enable Bit
207 #define B_PCH_LPC_FWH_BIOS_DEC_E50 BIT1 // 50-5F Enable
    [all...]
PchRegsUsb.h 72 #define B_PCH_EHCI_PWR_CNTL_STS_PWR_STS (BIT1 | BIT0) // Power State
74 #define V_PCH_EHCI_PWR_CNTL_STS_PWR_STS_D3 (BIT1 | BIT0) // D3 Hot State
95 #define B_PCH_XHCI_PWR_CNTL_STS_PWR_STS (BIT1 | BIT0)
96 #define V_PCH_XHCI_PWR_CNTL_STS_PWR_STS_D3 (BIT1 | BIT0)
PchRegsSmbus.h 63 #define B_PCH_SMBUS_PCICMD_MSE BIT1 // Memory Space Enable
85 #define B_PCH_SMBUS_INTR BIT1 // Interrupt
101 #define B_PCH_SMBUS_KILL BIT1 // Kill
127 #define B_PCH_SMBUS_E32B BIT1 // Enable 32-byte Buffer
132 #define B_PCH_SMBUS_SMLINK1_CUR_STS BIT1 // Not supported
138 #define B_PCH_SMBUS_SMBDATA_CUR_STS BIT1 // SMBDATA Current Status
146 #define B_PCH_SMBUS_HOST_NOTIFY_WKEN BIT1 // Host Notify Wake Enable
  /device/linaro/bootloader/edk2/OvmfPkg/Include/IndustryStandard/
Q35MchIch9.h 34 #define MCH_GGC_IVD BIT1
47 #define MCH_ESMRAMC_TSEG_2MB BIT1
49 #define MCH_ESMRAMC_TSEG_MASK (BIT2 | BIT1)
  /external/swiftshader/third_party/LLVM/test/Transforms/MemCpyOpt/
2011-06-02-CallSlotOverwritten.ll 25 %bit1 = bitcast %struct1* %x to i64*
27 %load = load i64* %bit1, align 8
30 ; CHECK: %load = load i64* %bit1, align 8
  /device/linaro/bootloader/edk2/EmbeddedPkg/Drivers/Isp1761UsbDxe/
Isp1761UsbDxe.h 43 #define ISP1761_DC_INTERRUPT_SOF BIT1
83 #define ISP1761_CTRL_FUNCTION_STATUS BIT1
99 #define ISP1761_OTG_CTRL_DP_PULLDOWN BIT1
104 #define ISP1761_OTG_STATUS_A_B_SESS_VLD BIT1
  /device/linaro/bootloader/edk2/OvmfPkg/QemuVideoDxe/
VbeShim.c 130 // bit1 in each nibble is Write Enable
134 PciWrite8 (Pam1Address, Pam1 | (BIT1 | BIT0));
195 // bit1: optional information available (must be =1 for VBE v1.2+)
201 VbeModeInfo->ModeAttr = BIT7 | BIT5 | BIT4 | BIT3 | BIT1 | BIT0;
205 // bit1: bit1: readable
208 VbeModeInfo->WindowAAttr = BIT2 | BIT1 | BIT0;
240 // bit1: Bytes in reserved field may be used by application
242 VbeModeInfo->DirectColorModeInfo = BIT1;
264 // Clear Write Enable (bit1), keep Read Enable (bit0) set
    [all...]
  /device/linaro/bootloader/edk2/IntelFspPkg/Library/BaseCacheLib/
CacheLibInternal.h 36 #define B_EFI_MSR_CACHE_MEMORY_TYPE (BIT2 | BIT1 | BIT0)
53 #define B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT (BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)
  /device/linaro/bootloader/edk2/ArmPlatformPkg/Include/Drivers/
HdLcd.h 54 #define HDLCD_BUS_ERROR BIT1 /* DMA bus error */
64 #define HDLCD_BURST_2 BIT1
71 #define HDLCD_HSYNC_HIGH BIT1
  /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/
IScsiBootFirmwareTable.h 104 #define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_INITIATOR_STRUCTURE_FLAG_BOOT_SELECTED BIT1
128 #define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_NIC_STRUCTURE_FLAG_BOOT_SELECTED BIT1
156 #define EFI_ACPI_ISCSI_BOOT_FIRMWARE_TABLE_TARGET_STRUCTURE_FLAG_BOOT_SELECTED BIT1
  /external/llvm/test/Transforms/MemCpyOpt/
2011-06-02-CallSlotOverwritten.ll 25 %bit1 = bitcast %struct1* %x to i64*
27 %load = load i64, i64* %bit1, align 8
30 ; CHECK: %load = load i64, i64* %bit1, align 8

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