Lines Matching defs:in
5 * you may not use this file except in compliance with the License.
10 * Unless required by applicable law or agreed to in writing, software
63 // Live registers will be restored in the catch block if caught.
134 // Live registers will be restored in the catch block if caught.
446 // barrier. The field `obj.field` in the object `obj` holding this
455 // reference (different from `ref`) in `obj.field`).
484 << "Unexpected instruction in read barrier marking slow path: "
501 // and output in EAX):
521 // Should the reference in `ref_` be unpoisoned prior to marking it?
528 // and if needed, atomically updating the field `obj.field` in the
536 // another object reference (different from `ref`) in `obj.field`).
563 << "Unexpected instruction in read barrier marking and field updating slow path: "
586 // and output in EAX):
602 // update the field in the holder (`*field_addr`).
605 // another thread had concurrently changed it. In that case, the
606 // LOCK CMPXCHGL instruction in the compare-and-set (CAS)
619 // reference) to be in EAX. Save EAX beforehand, and move the
620 // expected value (stored in `temp_`) into EAX.
683 // Should the reference in `ref_` be unpoisoned prior to marking it?
714 // In that case, we have lost the information about the original
732 << "Unexpected instruction in read barrier for heap reference slow path: "
745 // Compute the actual memory offset and store it in `index`.
776 // The initial register stored in `index_` has already been
777 // saved in the call to art::SlowPathCode::SaveLiveRegisters
781 // Shifting the index value contained in `index_reg` by the scale
782 // factor (2) cannot overflow in practice, as the runtime is
791 // In the case of the UnsafeGetObject/UnsafeGetObjectVolatile
793 // (as in the case of ArrayGet), as it is actually an offset
885 << "Unexpected instruction in read barrier for GC root slow path: "
1091 // do this in HCurrentMethod, as the instruction might have been removed
1092 // in the SSA graph.
1661 // LHS is guaranteed to be in a register (see LocationsBuilderX86::HandleCondition).
1732 // In 32 bit mode, a long condition doesn't generate a single CC either.
1845 // MaybeRecordNativeDebugInfo is already called implicitly in CodeGenerator::Compile.
1855 // Handle the long/FP comparisons made in instruction simplification.
2264 // However this is not required in practice, as this is an
2268 // concurrent copying collector may not in the future).
2324 Location in = locations->InAt(0);
2327 DCHECK(in.IsRegister());
2328 DCHECK(in.Equals(out));
2333 DCHECK(in.IsRegisterPair());
2334 DCHECK(in.Equals(out));
2346 DCHECK(in.Equals(out));
2359 DCHECK(in.Equals(out));
2523 // The runtime helper puts the result in EAX, EDX.
2625 Location in = locations->InAt(0);
2634 if (in.IsRegisterPair()) {
2635 __ movsxb(out.AsRegister<Register>(), in.AsRegisterPairLow<ByteRegister>());
2637 DCHECK(in.GetConstant()->IsLongConstant());
2638 int64_t value = in.GetConstant()->AsLongConstant()->GetValue();
2648 if (in.IsRegister()) {
2649 __ movsxb(out.AsRegister<Register>(), in.AsRegister<ByteRegister>());
2651 DCHECK(in.GetConstant()->IsIntConstant());
2652 int32_t value = in.GetConstant()->AsIntConstant()->GetValue();
2667 if (in.IsRegisterPair()) {
2668 __ movsxw(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>());
2669 } else if (in.IsDoubleStackSlot()) {
2670 __ movsxw(out.AsRegister<Register>(), Address(ESP, in.GetStackIndex()));
2672 DCHECK(in.GetConstant()->IsLongConstant());
2673 int64_t value = in.GetConstant()->AsLongConstant()->GetValue();
2683 if (in.IsRegister()) {
2684 __ movsxw(out.AsRegister<Register>(), in.AsRegister<Register>());
2685 } else if (in.IsStackSlot()) {
2686 __ movsxw(out.AsRegister<Register>(), Address(ESP, in.GetStackIndex()));
2688 DCHECK(in.GetConstant()->IsIntConstant());
2689 int32_t value = in.GetConstant()->AsIntConstant()->GetValue();
2704 if (in.IsRegisterPair()) {
2705 __ movl(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>());
2706 } else if (in.IsDoubleStackSlot()) {
2707 __ movl(out.AsRegister<Register>(), Address(ESP, in.GetStackIndex()));
2709 DCHECK(in.IsConstant());
2710 DCHECK(in.GetConstant()->IsLongConstant());
2711 int64_t value = in.GetConstant()->AsLongConstant()->GetValue();
2718 XmmRegister input = in.AsFpuRegister<XmmRegister>();
2743 XmmRegister input = in.AsFpuRegister<XmmRegister>();
2783 DCHECK_EQ(in.AsRegister<Register>(), EAX);
2809 if (in.IsRegisterPair()) {
2810 __ movzxw(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>());
2811 } else if (in.IsDoubleStackSlot()) {
2812 __ movzxw(out.AsRegister<Register>(), Address(ESP, in.GetStackIndex()));
2814 DCHECK(in.GetConstant()->IsLongConstant());
2815 int64_t value = in.GetConstant()->AsLongConstant()->GetValue();
2825 if (in.IsRegister()) {
2826 __ movzxw(out.AsRegister<Register>(), in.AsRegister<Register>());
2827 } else if (in.IsStackSlot()) {
2828 __ movzxw(out.AsRegister<Register>(), Address(ESP, in.GetStackIndex()));
2830 DCHECK(in.GetConstant()->IsIntConstant());
2831 int32_t value = in.GetConstant()->AsIntConstant()->GetValue();
2851 __ cvtsi2ss(out.AsFpuRegister<XmmRegister>(), in.AsRegister<Register>());
2861 if (!in.IsDoubleStackSlot() || !out.IsStackSlot()) {
2867 PushOntoFPStack(in, 0, adjustment, false, true);
2886 __ cvtsd2ss(out.AsFpuRegister<XmmRegister>(), in.AsFpuRegister<XmmRegister>());
2904 __ cvtsi2sd(out.AsFpuRegister<XmmRegister>(), in.AsRegister<Register>());
2914 if (!in.IsDoubleStackSlot() || !out.IsDoubleStackSlot()) {
2920 PushOntoFPStack(in, 0, adjustment, false, true);
2939 __ cvtss2sd(out.AsFpuRegister<XmmRegister>(), in.AsFpuRegister<XmmRegister>());
3237 // The constant may have ended up in a register, so test explicitly to avoid
3431 // Load the values to the FP stack in reverse order, using temporaries if needed.
3674 // We need to save the numerator while we tweak eax and edx. As we are using imul in a way
3675 // which enforces results to be in EAX and EDX, things are simpler if we use EAX also as
3688 // Runtime helper puts the result in EAX, EDX.
3777 // We need to save the numerator while we tweak eax and edx. As we are using imul in a way
3778 // which enforces results to be in EAX and EDX, things are simpler if we use EDX also as
3791 // Runtime helper puts the result in EAX, EDX.
3907 // The shift count needs to be in CL or a constant.
4104 // The shift count needs to be in CL (unless it is a constant).
4310 Location in = locations->InAt(0);
4312 DCHECK(in.Equals(out));
4337 Location in = locations->InAt(0);
4339 DCHECK(in.Equals(out));
4477 * For those cases, all we need to ensure is that there is a scheduling barrier in place.
4531 Location callee_method = temp; // For all kinds except kRecursive, callee will be in temp.
4593 // intrinsics may have put the receiver in a different register. In the intrinsics
4604 // However this is not required in practice, as this is an
4608 // concurrent copying collector may not in the future).
4752 // The output overlaps in case of long: we don't want the low move
4753 // to overwrite the object's location. Likewise, in the case of
4813 // Note that a potential implicit null check is handled in this
4867 // Potential implicit null checks, in the case of reference or
4868 // long fields, are handled in the previous switch statement.
4875 // Memory barriers, in the case of references, are also handled
4876 // in the previous switch statement.
4895 // inputs that die at entry with one in a specific register.
4897 // Ensure the value is in a byte register.
4901 // In order to satisfy the semantics of volatile, this must be a single instruction store.
4907 // In order to satisfy the semantics of volatile, this must be a single instruction store.
4923 // Ensure the card is in a byte register.
4970 // Note that in the case where `value` is a null reference,
5213 // The output overlaps in case of long: we don't want the low move
5214 // to overwrite the array's location. Likewise, in the case of an
5291 // Note that a potential implicit null check is handled in this
5342 // Potential implicit null checks, in the case of reference or
5343 // long arrays, are handled in the previous switch statement.
5364 // We need the inputs to be different than the output in case of long operation.
5365 // In case of a byte operation, the register allocator does not support multiple
5366 // inputs that die at entry with one in a specific register.
5370 // Ensure the value is in a byte register.
5380 // Ensure the card is in a byte register.
5464 // even in the case where a class object is in the from-space
5467 // false negative, in which case we would take the ArraySet
5478 // nor the object reference in `register_value->klass`, as
5612 // Mask out most significant bit in case the array is String's array of char.
5667 // Address the length field in the array.
5674 // the string compression flag) with the in-memory length and avoid the temporary.
5710 // In suspend check slow path, usually there are no caller-save registers at all.
5712 // registers in full width (since the runtime only saves/restores lower part).
5989 // Take advantage of the 16 bytes in the XMM register.
6001 // Take advantage of the 16 bytes in the XMM register.
6756 // If the class reference currently in `temp` is null, jump to the slow path to throw the
6798 // If the class reference currently in `temp` is not null, jump
6855 // Fast path for the interface check. Since we compare with a memory location in the inner
7070 // in the following move operation, as we will need it for the
7223 // In slow path based read barriers, the read barrier call is
7224 // inserted after the original load. However, in fast path based
7238 // Note: the original implementation in ReadBarrier::Barrier is
7473 // Is the value in range?
7478 // We are in the range of the table.
7482 // Compute the actual target address by adding in constant_area.
7597 // The value to patch is the distance from the offset in the constant area
7603 // Patch in the right value.
7607 // Location in constant area that the fixup refers to.
7612 * Class to handle late fixup of offsets to a jump table that will be created in the
7628 // The label values in the jump table are computed relative to the
7770 // TODO: Consider pairs in the parallel move resolver, then this could be nicely merged
