Lines Matching refs:EmitOptionalRex32
41 EmitOptionalRex32(reg);
49 EmitOptionalRex32(address);
65 EmitOptionalRex32(reg);
72 EmitOptionalRex32(address);
93 EmitOptionalRex32(reg);
100 EmitOptionalRex32(address);
125 EmitOptionalRex32(dst);
152 EmitOptionalRex32(dst, src);
168 EmitOptionalRex32(dst, src);
184 EmitOptionalRex32(src, dst);
191 EmitOptionalRex32(dst);
199 EmitOptionalRex32(src, dst);
231 EmitOptionalRex32(dst, src);
252 EmitOptionalRex32(dst, src);
272 EmitOptionalRex32(dst, src);
294 EmitOptionalRex32(dst);
304 EmitOptionalRex32(dst, src);
313 EmitOptionalRex32(dst, src);
322 EmitOptionalRex32(dst, src);
331 EmitOptionalRex32(dst, src);
346 EmitOptionalRex32(src, dst);
355 EmitOptionalRex32(dst);
374 EmitOptionalRex32(dst, src);
382 EmitOptionalRex32(dst, src);
391 EmitOptionalRex32(dst, src);
400 EmitOptionalRex32(dst, src);
409 EmitOptionalRex32(src, dst);
418 EmitOptionalRex32(src, dst);
428 EmitOptionalRex32(dst, src);
438 EmitOptionalRex32(src, dst);
448 EmitOptionalRex32(src, dst); // Movss is MR encoding instead of the usual RM.
501 EmitOptionalRex32(dst, src);
511 EmitOptionalRex32(dst, src);
521 EmitOptionalRex32(dst, src);
531 EmitOptionalRex32(dst, src);
541 EmitOptionalRex32(dst, src);
551 EmitOptionalRex32(dst, src);
561 EmitOptionalRex32(dst, src);
571 EmitOptionalRex32(dst, src);
580 EmitOptionalRex32(dst, src);
589 EmitOptionalRex32(dst, src);
598 EmitOptionalRex32(dst, src);
607 EmitOptionalRex32(dst, src);
638 EmitOptionalRex32(dst, src);
648 EmitOptionalRex32(dst, src);
658 EmitOptionalRex32(dst, src);
668 EmitOptionalRex32(src, dst);
678 EmitOptionalRex32(src, dst);
688 EmitOptionalRex32(dst, src);
698 EmitOptionalRex32(src, dst);
708 EmitOptionalRex32(src, dst); // Movsd is MR encoding instead of the usual RM.
718 EmitOptionalRex32(dst, src);
728 EmitOptionalRex32(dst, src);
738 EmitOptionalRex32(dst, src);
748 EmitOptionalRex32(dst, src);
758 EmitOptionalRex32(dst, src);
768 EmitOptionalRex32(dst, src);
778 EmitOptionalRex32(dst, src);
788 EmitOptionalRex32(dst, src);
798 EmitOptionalRex32(dst, src);
808 EmitOptionalRex32(dst, src);
818 EmitOptionalRex32(dst, src);
828 EmitOptionalRex32(dst, src);
838 EmitOptionalRex32(dst, src);
848 EmitOptionalRex32(dst, src);
858 EmitOptionalRex32(dst, src);
868 EmitOptionalRex32(src, dst);
878 EmitOptionalRex32(src, dst);
888 EmitOptionalRex32(dst, src);
898 EmitOptionalRex32(dst, src);
908 EmitOptionalRex32(dst, src);
918 EmitOptionalRex32(dst, src);
928 EmitOptionalRex32(dst, src);
938 EmitOptionalRex32(dst, src);
948 EmitOptionalRex32(dst, src);
958 EmitOptionalRex32(dst, src);
969 EmitOptionalRex32(dst, src);
979 EmitOptionalRex32(dst, src);
998 EmitOptionalRex32(dst, src);
1013 EmitOptionalRex32(dst, src);
1033 EmitOptionalRex32(dst, src);
1048 EmitOptionalRex32(dst, src);
1059 EmitOptionalRex32(dst, src);
1069 EmitOptionalRex32(dst, src);
1079 EmitOptionalRex32(dst, src);
1089 EmitOptionalRex32(dst, src);
1108 EmitOptionalRex32(dst, src);
1128 EmitOptionalRex32(dst, src);
1139 EmitOptionalRex32(dst, src);
1149 EmitOptionalRex32(dst, src);
1158 EmitOptionalRex32(dst, src);
1168 EmitOptionalRex32(dst, src);
1177 EmitOptionalRex32(a, b);
1186 EmitOptionalRex32(a, b);
1196 EmitOptionalRex32(a, b);
1206 EmitOptionalRex32(a, b);
1215 EmitOptionalRex32(a, b);
1224 EmitOptionalRex32(a, b);
1234 EmitOptionalRex32(a, b);
1244 EmitOptionalRex32(a, b);
1254 EmitOptionalRex32(dst, src);
1266 EmitOptionalRex32(dst, src);
1278 EmitOptionalRex32(dst, src);
1288 EmitOptionalRex32(dst, src);
1298 EmitOptionalRex32(dst, src);
1308 EmitOptionalRex32(dst, src);
1317 EmitOptionalRex32(dst, src);
1326 EmitOptionalRex32(dst, src);
1336 EmitOptionalRex32(dst, src);
1346 EmitOptionalRex32(dst, src);
1355 EmitOptionalRex32(dst, src);
1363 EmitOptionalRex32(dst, src);
1372 EmitOptionalRex32(dst, src);
1381 EmitOptionalRex32(dst, src);
1389 EmitOptionalRex32(dst, src);
1398 EmitOptionalRex32(dst, src);
1407 EmitOptionalRex32(dst, src);
1415 EmitOptionalRex32(dst, src);
1424 EmitOptionalRex32(dst, src);
1433 EmitOptionalRex32(dst, src);
1442 EmitOptionalRex32(dst, src);
1451 EmitOptionalRex32(dst, src);
1461 EmitOptionalRex32(dst, src);
1471 EmitOptionalRex32(dst, src);
1480 EmitOptionalRex32(dst, src);
1489 EmitOptionalRex32(dst, src);
1499 EmitOptionalRex32(dst, src);
1509 EmitOptionalRex32(dst, src);
1518 EmitOptionalRex32(dst, src);
1527 EmitOptionalRex32(dst, src);
1537 EmitOptionalRex32(dst, src);
1547 EmitOptionalRex32(dst, src);
1557 EmitOptionalRex32(dst, src);
1566 EmitOptionalRex32(dst, src);
1574 EmitOptionalRex32(dst, src);
1583 EmitOptionalRex32(dst, src);
1592 EmitOptionalRex32(dst, src);
1601 EmitOptionalRex32(dst, src);
1610 EmitOptionalRex32(dst, src);
1619 EmitOptionalRex32(dst, src);
1628 EmitOptionalRex32(dst, src);
1638 EmitOptionalRex32(dst, src);
1647 EmitOptionalRex32(dst, src);
1656 EmitOptionalRex32(dst, src);
1665 EmitOptionalRex32(dst, src);
1675 EmitOptionalRex32(dst, src);
1685 EmitOptionalRex32(dst, src);
1696 EmitOptionalRex32(dst, src);
1707 EmitOptionalRex32(dst, src);
1717 EmitOptionalRex32(dst, src);
1727 EmitOptionalRex32(dst, src);
1737 EmitOptionalRex32(dst, src);
1968 EmitOptionalRex32(src_rax ? dst : src);
1974 EmitOptionalRex32(src, dst);
2007 EmitOptionalRex32(reg, address);
2016 EmitOptionalRex32(address);
2027 EmitOptionalRex32(address);
2035 EmitOptionalRex32(reg);
2042 EmitOptionalRex32(reg0, reg1);
2050 EmitOptionalRex32(reg, address);
2058 EmitOptionalRex32(reg, address);
2067 EmitOptionalRex32(address);
2106 EmitOptionalRex32(dst, src);
2114 EmitOptionalRex32(reg, address);
2122 EmitOptionalRex32(reg1, reg2);
2130 EmitOptionalRex32(reg, address);
2154 EmitOptionalRex32(reg);
2180 EmitOptionalRex32(dst);
2190 EmitOptionalRex32(dst);
2199 EmitOptionalRex32(dst, src);
2207 EmitOptionalRex32(reg, address);
2215 EmitOptionalRex32(dst);
2246 EmitOptionalRex32(dst, src);
2254 EmitOptionalRex32(reg, address);
2262 EmitOptionalRex32(dst);
2293 EmitOptionalRex32(dst, src);
2301 EmitOptionalRex32(reg, address);
2309 EmitOptionalRex32(dst);
2392 EmitOptionalRex32(reg);
2424 EmitOptionalRex32(reg, address);
2432 EmitOptionalRex32(address);
2439 EmitOptionalRex32(dst, src);
2447 EmitOptionalRex32(reg);
2478 EmitOptionalRex32(reg, address);
2499 EmitOptionalRex32(reg);
2515 EmitOptionalRex32(dst, src);
2525 EmitOptionalRex32(dst, src);
2550 EmitOptionalRex32(reg, address);
2602 EmitOptionalRex32(reg);
2618 EmitOptionalRex32(address);
2626 EmitOptionalRex32(reg);
2634 EmitOptionalRex32(address);
2742 EmitOptionalRex32(reg);
2758 EmitOptionalRex32(reg);
2879 EmitOptionalRex32(reg);
2886 EmitOptionalRex32(address);
2945 EmitOptionalRex32(reg, address);
3016 EmitOptionalRex32(dst, src);
3024 EmitOptionalRex32(dst, src);
3048 EmitOptionalRex32(dst, src);
3056 EmitOptionalRex32(dst, src);
3081 EmitOptionalRex32(dst, src);
3090 EmitOptionalRex32(dst, src);
3290 EmitOptionalRex32(reg);
3312 EmitOptionalRex32(operand);
3342 void X86_64Assembler::EmitOptionalRex32(CpuRegister reg) {
3346 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, CpuRegister src) {
3350 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, XmmRegister src) {
3354 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, XmmRegister src) {
3358 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, CpuRegister src) {
3362 void X86_64Assembler::EmitOptionalRex32(const Operand& operand) {
3369 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, const Operand& operand) {
3379 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, const Operand& operand) {
