Lines Matching refs:rbase
611 * Form an Effective Address rd = rbase + roff<<shift;
614 #define EASN(rd, rbase, roff, shift) LSA(rd, roff, rbase, shift)
616 #define EAS1(rd, rbase, roff) EASN(rd, rbase, roff, 1)
617 #define EAS2(rd, rbase, roff) EASN(rd, rbase, roff, 2)
618 #define EAS3(rd, rbase, roff) EASN(rd, rbase, roff, 3)
619 #define EAS4(rd, rbase, roff) EASN(rd, rbase, roff, 4)
621 #define LOAD_eas2(rd, rbase, roff) \
623 EAS2(AT, rbase, roff); \
627 #define STORE_eas2(rd, rbase, roff) \
629 EAS2(AT, rbase, roff); \
633 #define LOAD_RB_OFF(rd, rbase, off) lw rd, off(rbase)
634 #define STORE_RB_OFF(rd, rbase, off) sw rd, off(rbase)
636 #define STORE64_off(rlo, rhi, rbase, off) \
637 sw rlo, off(rbase); \
638 sw rhi, (off+4)(rbase)
639 #define LOAD64_off(rlo, rhi, rbase, off) \
640 lw rlo, off(rbase); \
641 lw rhi, (off+4)(rbase)
643 #define STORE64(rlo, rhi, rbase) STORE64_off(rlo, rhi, rbase, 0)
644 #define LOAD64(rlo, rhi, rbase) LOAD64_off(rlo, rhi, rbase, 0)
647 #define STORE64_off_F(rlo, rhi, rbase, off) \
648 s.s rlo, off(rbase); \
651 sw AT, (off+4)(rbase); \
653 #define LOAD64_off_F(rlo, rhi, rbase, off) \
654 l.s rlo, off(rbase); \
656 lw AT, (off+4)(rbase); \
660 #define STORE64_off_F(rlo, rhi, rbase, off) \
661 s.s rlo, off(rbase); \
662 s.s rhi, (off+4)(rbase)
663 #define LOAD64_off_F(rlo, rhi, rbase, off) \
664 l.s rlo, off(rbase); \
665 l.s rhi, (off+4)(rbase)
668 #define STORE64_F(rlo, rhi, rbase) STORE64_off_F(rlo, rhi, rbase, 0)
669 #define LOAD64_F(rlo, rhi, rbase) LOAD64_off_F(rlo, rhi, rbase, 0)
672 #define LOAD_base_offMirrorArray_length(rd, rbase) LOAD_RB_OFF(rd, rbase, MIRROR_ARRAY_LENGTH_OFFSET)
