Lines Matching defs:Src0Reg
4482 unsigned Src0Reg = getRegForValue(I->getOperand(0));
4483 if (!Src0Reg)
4494 unsigned QuotReg = fastEmitInst_rr(DivOpc, RC, Src0Reg, /*IsKill=*/false,
4500 Src1Reg, Src1IsKill, Src0Reg,
4546 unsigned Src0Reg = getRegForValue(Src0);
4547 if (!Src0Reg)
4552 emitLSL_ri(VT, SrcVT, Src0Reg, Src0IsKill, ShiftVal, IsZExt);
4560 unsigned Src0Reg = getRegForValue(I->getOperand(0));
4561 if (!Src0Reg)
4570 unsigned ResultReg = emitMul_rr(VT, Src0Reg, Src0IsKill, Src1Reg, Src1IsKill);
4761 unsigned Src0Reg = getRegForValue(I->getOperand(0));
4762 if (!Src0Reg)
4767 unsigned ResultReg = emitASR_ri(VT, VT, Src0Reg, Src0IsKill, Lg2);
4775 unsigned AddReg = emitAdd_ri_(VT, Src0Reg, /*IsKill=*/false, Pow2MinusOne);
4780 if (!emitICmp_ri(VT, Src0Reg, /*IsKill=*/false, 0))
4793 fastEmitInst_rri(SelectOpc, RC, AddReg, /*IsKill=*/true, Src0Reg,
