Lines Matching refs:VCC
88 // is vcc. We should handle this the same way we handle vopc, by addding
185 if (Use.getReg() == AMDGPU::VCC) {
330 // VOPC instructions can only write to the VCC register. We can't
331 // force them to use VCC here, because this is only one register and
333 // VCC, e.g. S_AND_B64 (vcc = V_CMP_...), (vcc = V_CMP_...)
335 // So, instead of forcing the instruction to write to VCC, we provide
336 // a hint to the register allocator to use VCC and then we we will run
337 // this pass again after RA and shrink it if it outputs to VCC.
338 MRI.setRegAllocationHint(MI.getOperand(0).getReg(), 0, AMDGPU::VCC);
341 if (DstReg != AMDGPU::VCC)
354 MRI.setRegAllocationHint(SReg, 0, AMDGPU::VCC);
357 if (SReg != AMDGPU::VCC)
368 // For VOPC instructions, this is replaced by an implicit def of vcc.
374 assert(MI.getOperand(0).getReg() == AMDGPU::VCC &&
394 // replaced with an implicit read of vcc. This was already added
