Lines Matching refs:Writeback
249 // tLDMIA is writeback-only - unless the base register is in the input
258 // There is no non-writeback tSTMIA either.
454 /// due to writeback. This function only works on Thumb1.
607 bool Writeback = isThumb1; // Thumb1 LDM/STM have base reg writeback.
610 // non-writeback.
615 Writeback = false;
652 // as the new base. Will no longer be writeback in Thumb1.
654 Writeback = false;
739 // base register writeback.
745 // - There is no writeback (LDM of base register),
752 if (isThumb1 && !SafeToClobberCPSR && Writeback && !BaseKill)
757 if (Writeback) {
758 assert(isThumb1 && "expected Writeback only inThumb1");
761 // Update tLDMIA with writeback if necessary.
767 // Thumb1: we might need to set base writeback when building the MI.
771 // The base isn't dead after a merged instruction with writeback.
777 // No writeback, simply build the MachineInstr.
1239 // can still change to a writeback form as that will save us 2 bytes
1349 // writeback register.
1441 // Behaviour for writeback is undefined if base register is the same as one
