Lines Matching refs:PredOp
251 unsigned DstSR, const MachineOperand &PredOp, bool PredSense,
263 const MachineOperand &PredOp, bool Cond,
609 /// PredOp. The Cond argument specifies whether the predicate is to be
610 /// if(PredOp), or if(!PredOp).
613 unsigned DstR, unsigned DstSR, const MachineOperand &PredOp,
629 .addOperand(PredOp)
857 const MachineOperand &PredOp, bool Cond,
886 MB.addReg(PredOp.getReg(), PredOp.isUndef() ? RegState::Undef : 0,
887 PredOp.getSubReg());