Lines Matching full:srcreg
135 bool emitStore(MVT VT, unsigned SrcReg, Address Addr,
137 bool emitStore(MVT VT, unsigned SrcReg, Address &Addr,
139 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
140 bool emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg,
143 bool emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
145 bool emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg);
146 bool emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT,
148 bool emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT,
169 MachineInstrBuilder emitInstStore(unsigned Opc, unsigned SrcReg,
171 return emitInst(Opc).addReg(SrcReg).addReg(MemReg).addImm(MemOffset);
778 bool MipsFastISel::emitStore(MVT VT, unsigned SrcReg, Address &Addr,
809 emitInstStore(Opc, SrcReg, Addr.getReg(), Addr.getOffset());
821 .addReg(SrcReg)
881 unsigned SrcReg = 0;
893 SrcReg = getRegForValue(Op0);
894 if (SrcReg == 0)
902 if (!emitStore(VT, SrcReg, Addr, cast<StoreInst>(I)->getAlignment()))
958 unsigned SrcReg =
961 if (!SrcReg)
965 emitInst(Mips::CVT_D32_S, DestReg).addReg(SrcReg);
1032 unsigned SrcReg = getRegForValue(Src);
1033 if (!SrcReg)
1040 emitInst(Mips::CVT_S_D32, DestReg).addReg(SrcReg);
1068 unsigned SrcReg = getRegForValue(Src);
1069 if (SrcReg == 0)
1079 emitInst(Opc, TempReg).addReg(SrcReg);
1353 unsigned SrcReg = getRegForValue(II->getOperand(0));
1354 if (SrcReg == 0)
1361 emitInst(Mips::WSBH, DestReg).addReg(SrcReg);
1371 emitInst(Mips::SLL, TempReg[0]).addReg(SrcReg).addImm(8);
1372 emitInst(Mips::SRL, TempReg[1]).addReg(SrcReg).addImm(8);
1381 emitInst(Mips::WSBH, TempReg).addReg(SrcReg);
1393 emitInst(Mips::SRL, TempReg[0]).addReg(SrcReg).addImm(8);
1394 emitInst(Mips::SRL, TempReg[1]).addReg(SrcReg).addImm(24);
1398 emitInst(Mips::ANDi, TempReg[4]).addReg(SrcReg).addImm(0xFF00);
1401 emitInst(Mips::SLL, TempReg[6]).addReg(SrcReg).addImm(24);
1481 unsigned SrcReg = Reg + VA.getValNo();
1484 if (!MRI.getRegClass(SrcReg)->contains(DestReg))
1506 SrcReg = emitIntExt(RVVT, SrcReg, DestVT, IsZExt);
1507 if (SrcReg == 0)
1514 TII.get(TargetOpcode::COPY), DestReg).addReg(SrcReg);
1539 unsigned SrcReg = getRegForValue(Op);
1540 if (!SrcReg)
1545 updateValueMap(I, SrcReg);
1554 unsigned SrcReg = getRegForValue(Src);
1555 if (!SrcReg)
1570 if (!emitIntExt(SrcVT, SrcReg, DestVT, ResultReg, isZExt))
1575 bool MipsFastISel::emitIntSExt32r1(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1589 emitInst(Mips::SLL, TempReg).addReg(SrcReg).addImm(ShiftAmt);
1594 bool MipsFastISel::emitIntSExt32r2(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1600 emitInst(Mips::SEB, DestReg).addReg(SrcReg);
1603 emitInst(Mips::SEH, DestReg).addReg(SrcReg);
1609 bool MipsFastISel::emitIntSExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1614 return emitIntSExt32r2(SrcVT, SrcReg, DestVT, DestReg);
1615 return emitIntSExt32r1(SrcVT, SrcReg, DestVT, DestReg);
1618 bool MipsFastISel::emitIntZExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1636 emitInst(Mips::ANDi, DestReg).addReg(SrcReg).addImm(Imm);
1640 bool MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1650 return emitIntZExt(SrcVT, SrcReg, DestVT, DestReg);
1651 return emitIntSExt(SrcVT, SrcReg, DestVT, DestReg);
1654 unsigned MipsFastISel::emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1657 bool Success = emitIntExt(SrcVT, SrcReg, DestVT, DestReg, isZExt);
