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Lines Matching refs:Op0Reg

1717   unsigned Op0Reg = getRegForValue(Op0);
1718   if (!Op0Reg)
1729     if (!emitIntExt(Op0MVT, Op0Reg, MVT::i32, TempReg, IsZExt))
1732     Op0Reg = TempReg;
1752     emitInst(Opcode, ResultReg).addReg(Op0Reg).addImm(ShiftVal);
1775   emitInst(Opcode, ResultReg).addReg(Op0Reg).addReg(Op1Reg);