Lines Matching refs:ResTy
1374 EVT ResTy = Op->getValueType(0);
1377 SDValue Result = DAG.getNode(Opc, DL, ResTy, Vec, Idx,
1498 EVT ResTy = Op->getValueType(0);
1500 SDValue One = DAG.getConstant(1, DL, ResTy);
1501 SDValue Bit = DAG.getNode(ISD::SHL, DL, ResTy, One, Op->getOperand(2));
1503 return DAG.getNode(ISD::AND, DL, ResTy, Op->getOperand(1),
1504 DAG.getNOT(DL, Bit, ResTy));
1509 EVT ResTy = Op->getValueType(0);
1510 APInt BitImm = APInt(ResTy.getVectorElementType().getSizeInBits(), 1)
1512 SDValue BitMask = DAG.getConstant(~BitImm, DL, ResTy);
1514 return DAG.getNode(ISD::AND, DL, ResTy, Op->getOperand(1), BitMask);
1856 EVT ResTy = Op->getValueType(0);
1857 SmallVector<SDValue, 16> Ops(ResTy.getVectorNumElements(),
1860 // If ResTy is v2i64 then the type legalizer will break this node down into
1862 return DAG.getBuildVector(ResTy, DL, Ops);
1867 EVT ResTy = Op->getValueType(0);
1869 ISD::FMUL, SDLoc(Op), ResTy, Op->getOperand(1),
1870 DAG.getNode(ISD::FEXP2, SDLoc(Op), ResTy, Op->getOperand(2)));
1888 EVT ResTy = Op->getValueType(0);
1889 return DAG.getNode(ISD::FSUB, SDLoc(Op), ResTy, Op->getOperand(1),
1890 DAG.getNode(ISD::FMUL, SDLoc(Op), ResTy,
1957 EVT ResTy = Op->getValueType(0);
1958 return DAG.getNode(ISD::ADD, SDLoc(Op), ResTy, Op->getOperand(1),
1959 DAG.getNode(ISD::SHL, SDLoc(Op), ResTy,
1966 EVT ResTy = Op->getValueType(0);
1967 return DAG.getNode(ISD::ADD, SDLoc(Op), ResTy, Op->getOperand(1),
1968 DAG.getNode(ISD::MUL, SDLoc(Op), ResTy,
2041 EVT ResTy = Op->getValueType(0);
2042 return DAG.getNode(ISD::SUB, SDLoc(Op), ResTy, Op->getOperand(1),
2043 DAG.getNode(ISD::MUL, SDLoc(Op), ResTy,
2180 EVT ResTy = Op->getValueType(0);
2185 return DAG.getLoad(ResTy, DL, ChainIn, Address, MachinePointerInfo(), false,
2299 EVT ResTy = Op->getValueType(0);
2306 if (ResTy.isInteger()) {
2309 return DAG.getNode(MipsISD::VEXTRACT_SEXT_ELT, DL, ResTy, Op0, Op1,
2349 EVT ResTy = Op->getValueType(0);
2355 if (!Subtarget.hasMSA() || !ResTy.is128BitVector())
2370 if (ResTy.isInteger() && !HasAnyUndefs && SplatValue.isSignedIntN(10))
2396 if (ViaVecTy != ResTy)
2397 Result = DAG.getNode(ISD::BITCAST, SDLoc(Node), ResTy, Result);
2406 EVT ResTy = Node->getValueType(0);
2408 assert(ResTy.isVector());
2410 unsigned NumElts = ResTy.getVectorNumElements();
2411 SDValue Vector = DAG.getUNDEF(ResTy);
2413 Vector = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, ResTy, Vector,
2441 static SDValue lowerVECTOR_SHUFFLE_SHF(SDValue Op, EVT ResTy,
2486 return DAG.getNode(MipsISD::SHF, DL, ResTy,
2521 static bool isVECTOR_SHUFFLE_SPLATI(SDValue Op, EVT ResTy,
2553 static SDValue lowerVECTOR_SHUFFLE_ILVEV(SDValue Op, EVT ResTy,
2581 return DAG.getNode(MipsISD::ILVEV, SDLoc(Op), ResTy, Ws, Wt);
2599 static SDValue lowerVECTOR_SHUFFLE_ILVOD(SDValue Op, EVT ResTy,
2627 return DAG.getNode(MipsISD::ILVOD, SDLoc(Op), ResTy, Wt, Ws);
2646 static SDValue lowerVECTOR_SHUFFLE_ILVR(SDValue Op, EVT ResTy,
2674 return DAG.getNode(MipsISD::ILVR, SDLoc(Op), ResTy, Ws, Wt);
2693 static SDValue lowerVECTOR_SHUFFLE_ILVL(SDValue Op, EVT ResTy,
2723 return DAG.getNode(MipsISD::ILVL, SDLoc(Op), ResTy, Ws, Wt);
2741 static SDValue lowerVECTOR_SHUFFLE_PCKEV(SDValue Op, EVT ResTy,
2766 return DAG.getNode(MipsISD::PCKEV, SDLoc(Op), ResTy, Ws, Wt);
2784 static SDValue lowerVECTOR_SHUFFLE_PCKOD(SDValue Op, EVT ResTy,
2809 return DAG.getNode(MipsISD::PCKOD, SDLoc(Op), ResTy, Ws, Wt);
2820 static SDValue lowerVECTOR_SHUFFLE_VSHF(SDValue Op, EVT ResTy,
2826 EVT MaskVecTy = ResTy.changeVectorElementTypeToInteger();
2831 int ResTyNumElts = ResTy.getVectorNumElements();
2866 return DAG.getNode(MipsISD::VSHF, DL, ResTy, MaskVec, Op1, Op0);
2874 EVT ResTy = Op->getValueType(0);
2876 if (!ResTy.is128BitVector())
2879 int ResTyNumElts = ResTy.getVectorNumElements();
2887 if (isVECTOR_SHUFFLE_SPLATI(Op, ResTy, Indices, DAG))
2888 return lowerVECTOR_SHUFFLE_VSHF(Op, ResTy, Indices, DAG);
2890 if ((Result = lowerVECTOR_SHUFFLE_ILVEV(Op, ResTy, Indices, DAG)))
2892 if ((Result = lowerVECTOR_SHUFFLE_ILVOD(Op, ResTy, Indices, DAG)))
2894 if ((Result = lowerVECTOR_SHUFFLE_ILVL(Op, ResTy, Indices, DAG)))
2896 if ((Result = lowerVECTOR_SHUFFLE_ILVR(Op, ResTy, Indices, DAG)))
2898 if ((Result = lowerVECTOR_SHUFFLE_PCKEV(Op, ResTy, Indices, DAG)))
2900 if ((Result = lowerVECTOR_SHUFFLE_PCKOD(Op, ResTy, Indices, DAG)))
2902 if ((Result = lowerVECTOR_SHUFFLE_SHF(Op, ResTy, Indices, DAG)))
2904 return lowerVECTOR_SHUFFLE_VSHF(Op, ResTy, Indices, DAG);
