Lines Matching refs:IndexReg
61 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
69 (IndexReg.getReg() != 0 &&
70 X86MCRegisterClasses[X86::GR16RegClassID].contains(IndexReg.getReg())))
207 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
211 (IndexReg.getReg() != 0 &&
212 X86MCRegisterClasses[X86::GR32RegClassID].contains(IndexReg.getReg())))
215 assert(IndexReg.getReg() == 0 && "Invalid eip-based address.");
226 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
230 (IndexReg.getReg() != 0 &&
231 X86MCRegisterClasses[X86::GR64RegClassID].contains(IndexReg.getReg())))
357 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
365 assert(IndexReg.getReg() == 0 && "Invalid rip-relative address");
429 if (IndexReg.getReg()) {
430 unsigned IndexReg16 = R16Table[GetX86RegNum(IndexReg)];
475 IndexReg.getReg() == 0 &&
528 assert(IndexReg.getReg() != X86::ESP &&
529 IndexReg.getReg() != X86::RSP && "Cannot use ESP as index reg!");
572 if (IndexReg.getReg())
573 IndexRegNo = GetX86RegNum(IndexReg);
579 if (IndexReg.getReg())
580 IndexRegNo = GetX86RegNum(IndexReg);
