Lines Matching refs:SDNode
2222 bool X86TargetLowering::isUsedByReturnOnly(SDNode *N, SDValue &Chain) const {
2227 SDNode *Copy = *N->use_begin();
2238 for (SDNode::use_iterator UI = Copy->use_begin(), UE = Copy->use_end();
4135 bool X86TargetLowering::shouldReduceLoadWidth(SDNode *Load,
4248 static bool isVEXTRACTIndex(SDNode *N, unsigned vecWidth) {
4267 static bool isVINSERTIndex(SDNode *N, unsigned vecWidth) {
4282 bool X86::isVINSERT128Index(SDNode *N) {
4286 bool X86::isVINSERT256Index(SDNode *N) {
4290 bool X86::isVEXTRACT128Index(SDNode *N) {
4294 bool X86::isVEXTRACT256Index(SDNode *N) {
4298 static unsigned getExtractVEXTRACTImmediate(SDNode *N, unsigned vecWidth) {
4313 static unsigned getInsertVINSERTImmediate(SDNode *N, unsigned vecWidth) {
4330 unsigned X86::getExtractVEXTRACT128Immediate(SDNode *N) {
4336 unsigned X86::getExtractVEXTRACT256Immediate(SDNode *N) {
4342 unsigned X86::getInsertVINSERT128Immediate(SDNode *N) {
4348 unsigned X86::getInsertVINSERT256Immediate(SDNode *N) {
4852 static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
5195 static SDValue getShuffleScalarElt(SDNode *N, unsigned Index, SelectionDAG &DAG,
12358 SDNode *User = *Op.getNode()->use_begin();
14308 for (SDNode *User : Op->uses())
14494 SDNode *N = Op.getNode();
14577 for (SDNode::use_iterator UI = Op->use_begin(), UE = Op->use_end(); UI != UE;
14579 SDNode *User = *UI;
14704 for (SDNode
14775 for (SDNode::use_iterator UI = Op.getNode()->use_begin(),
14902 // build an SDNode sequence that transfers the result from FPSW into EFLAGS:
16678 SDNode *User = *Op.getNode()->use_begin();
16684 SDNode *NewBR =
16719 SDNode *User = *Op.getNode()->use_begin();
16725 SDNode *NewBR =
16750 SDNode *User = *Op.getNode()->use_begin();
16756 SDNode *NewBR =
16816 SDNode *Node = Op.getNode();
17256 /// \brief Creates an SDNode for a predicated scalar operation.
18179 SDNode *Res = DAG.getMachineNode(Opc, dl, VTs, Ops);
18199 SDNode *Res = DAG.getMachineNode(Opc, dl, VTs, Ops);
18217 SDNode *Res = DAG.getMachineNode(Opc, dl, MVT::Other, Ops);
18223 static void getReadPerformanceCounter(SDNode *N, const SDLoc &DL,
18270 static void getReadTimeStampCounter(SDNode *N, const SDLoc &DL, unsigned Opcode,
20478 SDNode *N = Op.getNode();
20713 SDNode *Res = DAG.getMachineNode(X86::OR32mrLocked, dl, MVT::Other, Ops);
21239 SDNode *Node = Op.getNode();
21778 void X86TargetLowering::LowerOperationWrapper(SDNode *N,
21798 void X86TargetLowering::ReplaceNodeResults(SDNode *N,
24657 bool X86TargetLowering::isGAPlusOffset(SDNode *N,
24672 static SDValue combineShuffle256(SDNode *N, SelectionDAG &DAG,
25988 static SDValue combineShuffleToAddSub(SDNode *N, const X86Subtarget &Subtarget,
26039 static SDValue combineShuffle(SDNode *N, SelectionDAG &DAG,
26151 static SDValue XFormVExtractWithShuffleIntoLoad(SDNode *N, SelectionDAG &DAG,
26251 static SDValue combineBitcast(SDNode *N, SelectionDAG &DAG,
26298 static SDValue combineExtractVectorElt(SDNode *N, SelectionDAG &DAG,
26338 SmallVector<SDNode *, 4> Uses;
26340 for (SDNode::use_iterator UI = InputVector.getNode()->use_begin(),
26345 SDNode *Extract = *UI;
26420 for (SmallVectorImpl<SDNode *>::iterator UI = Uses.begin(),
26422 SDNode *Extract = *UI;
26434 static SDValue combineSelect(SDNode *N, SelectionDAG &DAG,
26902 for (SDNode::use_iterator I = Cond->use_begin(), E = Cond->use_end();
26911 for (SDNode::use_iterator I = Cond->use_begin(), E = Cond->use_end();
27184 static SDValue combineCMov(SDNode *N, SelectionDAG &DAG,
27395 static bool canReduceVMulWidth(SDNode *N, SelectionDAG &DAG, ShrinkMode &Mode) {
27489 static SDValue reduceVMULWidth(SDNode *N, SelectionDAG &DAG,
27595 static SDValue combineMul(SDNode *N, SelectionDAG &DAG,
27685 static SDValue combineShiftLeft(SDNode *N, SelectionDAG &DAG) {
27745 static SDValue combineShiftRightAlgebraic(SDNode *N, SelectionDAG &DAG) {
27801 static SDValue performShiftToAllZeros(SDNode *N, SelectionDAG &DAG,
27829 static SDValue combineShift(SDNode* N, SelectionDAG &DAG,
27851 static SDValue combineCompareEqual(SDNode *N, SelectionDAG &DAG,
27876 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
27952 static SDValue combineANDXORWithAllOnesIntoANDNP(SDNode *N, SelectionDAG &DAG) {
27998 static SDValue WidenMaskArithmetic(SDNode *N, SelectionDAG &DAG,
28076 static SDValue combineVectorZext(SDNode *N, SelectionDAG &DAG,
28168 static SDValue convertIntLogicToFPLogic(SDNode *N, SelectionDAG &DAG,
28204 static SDValue combinePCMPAnd1(SDNode *N, SelectionDAG &DAG) {
28236 static SDValue combineAnd(SDNode *N, SelectionDAG &DAG,
28296 static SDValue combineLogicBlendIntoPBLENDV(SDNode *N, SelectionDAG &DAG,
28369 auto IsNegV = [](SDNode *N, SDValue V) {
28415 static SDValue combineOr(SDNode *N, SelectionDAG &DAG,
28503 static SDValue combineIntegerAbs(SDNode *N, SelectionDAG &DAG) {
28540 static SDValue foldXorTruncShiftIntoCmp(SDNode *N, SelectionDAG &DAG) {
28595 static SDValue foldVectorXorShiftIntoCmp(SDNode *N, SelectionDAG &DAG,
28636 static SDValue combineXor(SDNode *N, SelectionDAG &DAG,
28779 static SDValue combineLoad(SDNode *N, SelectionDAG &DAG,
28962 static SDValue combineMaskedLoad(SDNode *N, SelectionDAG &DAG,
29078 static SDValue combineMaskedStore(SDNode *N, SelectionDAG &DAG,
29167 static SDValue combineStore(SDNode *N, SelectionDAG &DAG,
29315 SDNode* LdVal = St->getValue().getNode();
29319 SDNode* ChainVal = St->getChain().getNode();
29553 static SDValue combineFaddFsub(SDNode *N, SelectionDAG &DAG,
29573 combineVectorTruncationWithPACKUS(SDNode *N, SelectionDAG &DAG,
29628 combineVectorTruncationWithPACKSS(SDNode *N, SelectionDAG &DAG,
29657 static SDValue combineVectorTruncation(SDNode *N, SelectionDAG &DAG,
29712 static SDValue combineTruncate(SDNode *N, SelectionDAG &DAG,
29734 static SDValue combineFneg(SDNode *N, SelectionDAG &DAG,
29776 static SDValue lowerX86FPLogicOp(SDNode *N, SelectionDAG &DAG,
29802 static SDValue combineFOr(SDNode *N, SelectionDAG &DAG,
29820 static SDValue combineFMinFMax(SDNode *N, SelectionDAG &DAG) {
29840 static SDValue combineFMinNumFMaxNum(SDNode *N, SelectionDAG &DAG,
29897 static SDValue combineFAnd(SDNode *N, SelectionDAG &DAG,
29913 static SDValue combineFAndn(SDNode *N, SelectionDAG &DAG,
29928 static SDValue combineBT(SDNode *N, SelectionDAG &DAG,
29946 static SDValue combineVZextMovl(SDNode *N, SelectionDAG &DAG) {
29957 static SDValue combineSignExtendInReg(SDNode *N, SelectionDAG &DAG,
29996 static SDValue promoteSextBeforeAddNSW(SDNode *Sext, SelectionDAG &DAG,
30047 static SDValue getDivRem8(SDNode *N, SelectionDAG &DAG) {
30073 static SDValue combineToExtendVectorInReg(SDNode *N, SelectionDAG &DAG,
30163 static SDValue combineSext(SDNode *N, SelectionDAG &DAG,
30197 static SDValue combineFMA(SDNode *N, SelectionDAG &DAG,
30236 static SDValue combineZext(SDNode *N, SelectionDAG &DAG,
30288 static SDValue combineSetCC(SDNode *N, SelectionDAG &DAG,
30352 static SDValue combineGatherScatter(SDNode *N, SelectionDAG &DAG) {
30385 static SDValue combineX86SetCC(SDNode *N, SelectionDAG &DAG,
30426 static SDValue combineBrCond(SDNode *N, SelectionDAG &DAG,
30445 static SDValue combineVectorCompareAndMaskUnaryOp(SDNode *N,
30491 static SDValue combineUIntToFP(SDNode *N, SelectionDAG &DAG,
30516 static SDValue combineSIntToFP(SDNode *N, SelectionDAG &DAG,
30562 static SDValue combineADC(SDNode *N, SelectionDAG &DAG,
30591 static SDValue OptimizeConditionalInDecrement(SDNode *N, SelectionDAG &DAG) {
30628 static SDValue detectSADPattern(SDNode *N, SelectionDAG &DAG,
30763 static SDValue combineAdd(SDNode *N, SelectionDAG &DAG,
30783 static SDValue combineSub(SDNode *N, SelectionDAG &DAG,
30816 static SDValue combineVZext(SDNode *N, SelectionDAG &DAG,
30895 static SDValue combineLockSub(SDNode *N, SelectionDAG &DAG,
30915 static SDValue combineTestM(SDNode *N, SelectionDAG &DAG) {
30929 static SDValue combineVectorCompare(SDNode *N, SelectionDAG &DAG,
30945 SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
