Lines Matching full:vr128
15 def rr : IXOP<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
17 [(set VR128:$dst, (Int VR128:$src))]>, XOP;
18 def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
20 [(set VR128:$dst, (Int (bitconvert (memop addr:$src))))]>, XOP;
44 def rr : IXOP<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
46 [(set VR128:$dst, (Int VR128:$src))]>, XOP;
47 def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst), (ins memop:$src),
49 [(set VR128:$dst, (Int (bitconvert mem_cpat:$src)))]>, XOP;
54 def rr : IXOP<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
56 [(set VR128:$dst, (Int VR128:$src))]>, XOP;
57 def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src),
59 [(set VR128:$dst, (Int (bitconvert (memop addr:$src))))]>, XOP;
88 def rr : IXOP<opc, MRMSrcReg, (outs VR128:$dst),
89 (ins VR128:$src1, VR128:$src2),
91 [(set VR128:$dst,
92 (vt128 (OpNode (vt128 VR128:$src1), (vt128 VR128:$src2))))]>,
94 def rm : IXOP<opc, MRMSrcMem, (outs VR128:$dst),
95 (ins VR128:$src1, i128mem:$src2),
97 [(set VR128:$dst,
98 (vt128 (OpNode (vt128 VR128:$src1),
101 def mr : IXOP<opc, MRMSrcMem, (outs VR128:$dst),
102 (ins i128mem:$src1, VR128:$src2),
104 [(set VR128:$dst,
106 (vt128 VR128:$src2))))]>,
127 def ri : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
128 (ins VR128:$src1, u8imm:$src2),
130 [(set VR128:$dst,
131 (vt128 (OpNode (vt128 VR128:$src1), imm:$src2)))]>, XOP;
132 def mi : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
135 [(set VR128:$dst,
149 def rr : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
150 (ins VR128:$src1, VR128:$src2, VR128:$src3),
153 [(set VR128:$dst,
154 (Int VR128:$src1, VR128:$src2, VR128:$src3))]>, XOP_4V, VEX_I8IMM;
155 def rm : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
156 (ins VR128:$src1, i128mem:$src2, VR128:$src3),
159 [(set VR128:$dst,
160 (Int VR128:$src1, (bitconvert (loadv2i64 addr:$src2)),
161 VR128:$src3))]>, XOP_4V, VEX_I8IMM;
182 def ri : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
183 (ins VR128:$src1, VR128:$src2, XOPCC:$cc),
186 [(set VR128:$dst,
187 (vt128 (OpNode (vt128 VR128:$src1), (vt128 VR128:$src2),
190 def mi : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
191 (ins VR128:$src1, i128mem:$src2, XOPCC:$cc),
194 [(set VR128:$dst,
195 (vt128 (OpNode (vt128 VR128:$src1),
200 def ri_alt : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
201 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
206 def mi_alt : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
207 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
227 def rrr : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
228 (ins VR128:$src1, VR128:$src2, VR128:$src3),
231 [(set VR128:$dst,
232 (vt128 (OpNode (vt128 VR128:$src1), (vt128 VR128:$src2),
233 (vt128 VR128:$src3))))]>,
235 def rrm : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
236 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
239 [(set VR128:$dst,
240 (vt128 (OpNode (vt128 VR128:$src1), (vt128 VR128:$src2),
243 def rmr : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
244 (ins VR128:$src1, i128mem:$src2, VR128:$src3),
247 [(set VR128:$dst,
248 (v16i8 (OpNode (vt128 VR128:$src1), (vt128 (bitconvert (loadv2i64 addr:$src2))),
249 (vt128 VR128:$src3))))]>,
253 def rrr_REV : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
254 (ins VR128:$src1, VR128:$src2, VR128:$src3),
268 def rrr : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
269 (ins VR128:$src1, VR128:$src2, VR128:$src3),
272 [(set VR128:$dst, (Int128 VR128:$src1, VR128:$src2, VR128:$src3))]>,
274 def rrm : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
275 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
278 [(set VR128:$dst,
279 (Int128 VR128:$src1, VR128:$src2,
282 def rmr : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
283 (ins VR128:$src1, i128mem:$src2, VR128:$src3),
286 [(set VR128:$dst,
287 (Int128 VR128:$src1, (bitconvert (loadv2i64 addr:$src2)),
288 VR128:$src3))]>,
292 def rrr_REV : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
293 (ins VR128:$src1, VR128:$src2, VR128:$src3),
336 def : Pat<(v2i64 (or (and VR128:$src3, VR128:$src1),
337 (X86andnp VR128:$src3, VR128:$src2))),
338 (VPCMOVrrr VR128:$src1, VR128:$src2, VR128:$src3)>;
349 def rr : IXOP5<opc, MRMSrcReg, (outs VR128:$dst),
350 (ins VR128:$src1, VR128:$src2, VR128:$src3, u8imm:$src4),
353 [(set VR128:$dst,
354 (vt128 (OpNode (vt128 VR128:$src1), (vt128 VR128:$src2),
355 (id128 VR128:$src3), (i8 imm:$src4))))]>;
356 def rm : IXOP5<opc, MRMSrcMem, (outs VR128:$dst),
357 (ins VR128:$src1, VR128:$src2, i128mem:$src3, u8imm:$src4),
360 [(set VR128:$dst,
361 (vt128 (OpNode (vt128 VR128:$src1), (vt128 VR128:$src2),
365 def mr : IXOP5<opc, MRMSrcMem, (outs VR128:$dst),
366 (ins VR128:$src1, f128mem:$src2, VR128:$src3, u8imm:$src4),
369 [(set VR128:$dst,
370 (vt128 (OpNode (vt128 VR128:$src1),
372 (id128 VR128:$src3), (i8 imm:$src4))))]>;
375 def rr_REV : IXOP5<opc, MRMSrcReg, (outs VR128:$dst),
376 (ins VR128:$src1, VR128:$src2, VR128:$src3, u8imm:$src4),
