Lines Matching refs:dw1
296 disasm_inst_decode_dw1_low_gen6(struct disasm_inst *inst, uint32_t dw1)
300 inst->dst.base.file = GEN_EXTRACT(dw1, GEN6_INST_DST_FILE);
301 inst->dst.base.type = GEN_EXTRACT(dw1, GEN6_INST_DST_TYPE);
302 inst->src0.base.file = GEN_EXTRACT(dw1, GEN6_INST_SRC0_FILE);
303 inst->src0.base.type = GEN_EXTRACT(dw1, GEN6_INST_SRC0_TYPE);
304 inst->src1.base.file = GEN_EXTRACT(dw1, GEN6_INST_SRC1_FILE);
305 inst->src1.base.type = GEN_EXTRACT(dw1, GEN6_INST_SRC1_TYPE);
308 inst->nib_ctrl = (bool) (dw1 & GEN7_INST_NIBCTRL);
312 disasm_inst_decode_dw1_low_gen8(struct disasm_inst *inst, uint32_t dw1)
316 inst->flag_subreg = GEN_EXTRACT(dw1, GEN8_INST_FLAG_SUBREG);
317 inst->flag_reg = GEN_EXTRACT(dw1, GEN8_INST_FLAG_REG);
318 inst->mask_ctrl = GEN_EXTRACT(dw1, GEN8_INST_MASKCTRL);
320 inst->dst.base.file = GEN_EXTRACT(dw1, GEN8_INST_DST_FILE);
321 inst->dst.base.type = GEN_EXTRACT(dw1, GEN8_INST_DST_TYPE);
322 inst->src0.base.file = GEN_EXTRACT(dw1, GEN8_INST_SRC0_FILE);
323 inst->src0.base.type = GEN_EXTRACT(dw1, GEN8_INST_SRC0_TYPE);
325 inst->dst.base.addr_imm = GEN_EXTRACT(dw1, GEN8_INST_DST_ADDR_IMM_BIT9) <<
330 disasm_inst_decode_dw1_high_gen6(struct disasm_inst *inst, uint32_t dw1)
334 inst->dst.base.addr_mode = GEN_EXTRACT(dw1, GEN6_INST_DST_ADDRMODE);
337 inst->dst.base.reg = GEN_EXTRACT(dw1, GEN6_INST_DST_REG);
340 inst->dst.base.subreg = GEN_EXTRACT(dw1, GEN6_INST_DST_SUBREG);
343 GEN_EXTRACT(dw1, GEN6_INST_DST_SUBREG_ALIGN16) <<
349 GEN_EXTRACT(dw1, GEN8_INST_DST_ADDR_SUBREG);
354 GEN_EXTRACT(dw1, GEN8_INST_DST_ADDR_IMM);
357 GEN_EXTRACT(dw1, GEN8_INST_DST_ADDR_IMM_ALIGN16) <<
362 GEN_EXTRACT(dw1, GEN6_INST_DST_ADDR_SUBREG);
366 GEN_EXTRACT(dw1, GEN6_INST_DST_ADDR_IMM);
369 GEN_EXTRACT(dw1, GEN6_INST_DST_ADDR_IMM_ALIGN16) <<
375 inst->dst.horz_stride = GEN_EXTRACT(dw1, GEN6_INST_DST_HORZSTRIDE);
380 inst->dst.writemask = GEN_EXTRACT(dw1, GEN6_INST_DST_WRITEMASK);
384 disasm_inst_decode_dw1_gen6(struct disasm_inst *inst, uint32_t dw1)
389 disasm_inst_decode_dw1_low_gen8(inst, dw1);
391 disasm_inst_decode_dw1_low_gen6(inst, dw1);
395 inst->u.imm64 = dw1 >> 16;
397 disasm_inst_decode_dw1_high_gen6(inst, dw1);
523 disasm_inst_decode_3src_dw1_gen6(struct disasm_inst *inst, uint32_t dw1)
534 inst->flag_subreg = GEN_EXTRACT(dw1, GEN6_3SRC_FLAG_SUBREG);
537 inst->nib_ctrl = (bool) (dw1 & GEN7_3SRC_NIBCTRL);
538 inst->flag_reg = GEN_EXTRACT(dw1, GEN7_3SRC_FLAG_REG);
541 inst->dst.base.type = GEN_EXTRACT(dw1, GEN7_3SRC_DST_TYPE);
544 inst->src0.base.type = GEN_EXTRACT(dw1, GEN7_3SRC_SRC_TYPE);
550 inst->dst.base.file = (dw1 & GEN6_3SRC_DST_FILE_MRF) ?
560 inst->dst.base.reg = GEN_EXTRACT(dw1, GEN6_3SRC_DST_REG);
561 inst->dst.base.subreg = GEN_EXTRACT(dw1, GEN6_3SRC_DST_SUBREG) <<
565 inst->dst.writemask = GEN_EXTRACT(dw1, GEN6_3SRC_DST_WRITEMASK);
568 inst->src0.negate = (bool) (dw1 & GEN6_3SRC_SRC0_NEGATE);
569 inst->src0.absolute = (bool) (dw1 & GEN6_3SRC_SRC0_ABSOLUTE);
571 inst->src1.negate = (bool) (dw1 & GEN6_3SRC_SRC1_NEGATE);
572 inst->src1.absolute = (bool) (dw1 & GEN6_3SRC_SRC1_ABSOLUTE);
574 inst->u.src2.negate = (bool) (dw1 & GEN6_3SRC_SRC2_NEGATE);
575 inst->u.src2.absolute = (bool) (dw1 & GEN6_3SRC_SRC2_ABSOLUTE);
579 disasm_inst_decode_3src_dw1_gen8(struct disasm_inst *inst, uint32_t dw1)
595 inst->flag_subreg = GEN_EXTRACT(dw1, GEN8_3SRC_FLAG_SUBREG);
596 inst->flag_reg = GEN_EXTRACT(dw1, GEN8_3SRC_FLAG_REG);
597 inst->mask_ctrl = GEN_EXTRACT(dw1, GEN8_3SRC_MASKCTRL);
598 inst->src0.absolute = (bool) (dw1 & GEN8_3SRC_SRC0_ABSOLUTE);
599 inst->src0.negate = (bool) (dw1 & GEN8_3SRC_SRC0_NEGATE);
600 inst->src1.negate = (bool) (dw1 & GEN8_3SRC_SRC1_NEGATE);
601 inst->src1.absolute = (bool) (dw1 & GEN8_3SRC_SRC1_ABSOLUTE);
602 inst->u.src2.negate = (bool) (dw1 & GEN8_3SRC_SRC2_NEGATE);
603 inst->u.src2.absolute = (bool) (dw1 & GEN8_3SRC_SRC2_ABSOLUTE);
606 inst->src0.base.type = GEN_EXTRACT(dw1, GEN8_3SRC_SRC_TYPE);
616 inst->dst.base.type = GEN_EXTRACT(dw1, GEN8_3SRC_DST_TYPE);
621 inst->dst.writemask = GEN_EXTRACT(dw1, GEN6_3SRC_DST_WRITEMASK);
622 inst->dst.base.subreg = GEN_EXTRACT(dw1, GEN6_3SRC_DST_SUBREG) <<
624 inst->dst.base.reg = GEN_EXTRACT(dw1, GEN6_3SRC_DST_REG);
688 * - DW1 is EU_INSTRUCTION_OPERAND_CONTROLS
