Lines Matching defs:sws
105 get_float_cap(struct svga_winsys_screen *sws, unsigned cap, float defaultVal)
108 if (sws->get_cap(sws, cap, &result))
117 get_uint_cap(struct svga_winsys_screen *sws, unsigned cap, unsigned defaultVal)
120 if (sws->get_cap(sws, cap, &result))
129 get_bool_cap(struct svga_winsys_screen *sws, unsigned cap, boolean defaultVal)
132 if (sws->get_cap(sws, cap, &result))
143 struct svga_winsys_screen *sws = svgascreen->sws;
157 return (float) get_uint_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, 4);
178 struct svga_winsys_screen *sws = svgascreen->sws;
194 return sws->have_vgpu10 ? 1 : 0;
208 return sws->have_vgpu10;
226 if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
230 if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
238 if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
251 return sws->have_vgpu10 ? SVGA3D_MAX_SURFACE_ARRAYSIZE : 0;
259 return sws->have_vgpu10;
263 return !sws->have_vgpu10;
276 return sws->have_vgpu10 ? 330 : 120;
292 return sws->have_vgpu10;
295 return sws->have_vgpu10 ? SVGA3D_DX_MAX_SOTARGETS : 0;
297 return sws->have_vgpu10 ? 4 : 0;
299 return sws->have_vgpu10 ? SVGA3D_MAX_STREAMOUT_DECLS : 0;
310 return sws->have_vgpu10 ? VGPU10_MIN_TEXEL_FETCH_OFFSET : 0;
312 return sws->have_vgpu10 ? VGPU10_MAX_TEXEL_FETCH_OFFSET : 0;
319 return sws->have_vgpu10 ? 256 : 0;
321 return sws->have_vgpu10 ? 1024 : 0;
327 return sws->have_generate_mipmap_cmd;
397 return sws->have_vgpu10;
399 return sws->have_vgpu10;
439 struct svga_winsys_screen *sws = svgascreen->sws;
442 assert(!sws->have_vgpu10);
451 return get_uint_cap(sws,
468 val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, 32);
519 return get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS,
536 val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, 32);
596 struct svga_winsys_screen *sws = svgascreen->sws;
598 assert(sws->have_vgpu10);
599 (void) sws; /* silence unused var warnings in non-debug builds */
682 struct svga_winsys_screen *sws = svgascreen->sws;
683 if (sws->have_vgpu10) {
733 if (ss->sws->have_vgpu10 && (bindings & PIPE_BIND_VERTEX_BUFFER)) {
813 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
814 sws->fence_reference(sws, ptr, fence);
824 struct svga_winsys_screen *sws = svga_screen(screen)->sws;
827 SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_FENCEFINISH);
830 retVal = sws->fence_signalled(sws, fence, 0) == 0;
836 retVal = sws->fence_finish(sws, fence, 0) == 0;
839 SVGA_STATS_TIME_POP(sws);
925 svgascreen->sws->destroy(svgascreen->sws);
935 svga_screen_create(struct svga_winsys_screen *sws)
976 svgascreen->sws = sws;
980 if (sws->get_hw_version) {
981 svgascreen->hw_version = sws->get_hw_version(sws);
1033 if (sws->have_vgpu10) {
1035 = get_bool_cap(sws, SVGA3D_DEVCAP_DX_PROVOKING_VERTEX, FALSE);
1043 get_uint_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES, 0);
1048 get_uint_cap(sws, SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS, 1);
1053 unsigned vs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION,
1055 unsigned fs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION,
1066 get_bool_cap(sws, SVGA3D_DEVCAP_LINE_AA, FALSE);
1069 get_float_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, 1.0f);
1088 get_bool_cap(sws, SVGA3D_DEVCAP_LINE_STIPPLE, FALSE);
1091 get_float_cap(sws, SVGA3D_DEVCAP_MAX_LINE_WIDTH, 1.0f);
1094 get_float_cap(sws, SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH, 1.0f);
1122 return svga_screen(screen)->sws;
