Lines Matching full:uaddr2
60 int *uaddr2, unsigned long val3, int rc)
66 # define CHECK_FUTEX_GENERIC(uaddr, op, val, timeout, uaddr2, val3, check, \
70 (uaddr2), (val3)); \
78 (unsigned long) (timeout), (int *) (uaddr2), \
82 # define CHECK_FUTEX_ENOSYS(uaddr, op, val, timeout, uaddr2, val3, check) \
83 CHECK_FUTEX_GENERIC(uaddr, op, val, timeout, uaddr2, val3, check, 1)
85 # define CHECK_FUTEX(uaddr, op, val, timeout, uaddr2, val3, check) \
86 CHECK_FUTEX_GENERIC(uaddr, op, val, timeout, uaddr2, val3, check, 0)
166 TAIL_ALLOC_OBJECT_CONST_PTR(int, uaddr2);
172 uaddr2[0] = 0xbadf00d;
184 * 5. uaddr2 - not used
189 CHECK_FUTEX(NULL, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
196 CHECK_FUTEX(uaddr + 1, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
203 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout + 1, uaddr2, VAL3,
212 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
221 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
230 /* uaddr is not as provided; uaddr2 is faulty but ignored */
231 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2 + 1, VAL3,
237 /* uaddr is not as provided; uaddr2 is faulty but ignored */
239 uaddr2 + 1, VAL3, (rc == -1) && (errno == EAGAIN));
250 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN));
258 VAL, tmout, uaddr2, 0, (rc == -1) && (errno == EAGAIN));
272 * 5. uaddr2 - not used
276 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_WAIT_BITSET, VAL, tmout, uaddr2 + 1,
285 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_WAIT_BITSET, VAL, tmout, uaddr2 + 1, 0,
293 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EAGAIN));
303 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EAGAIN));
312 tmout, uaddr2 + 1, 0, (rc == -1) && (errno == EINVAL));
319 FUTEX_WAIT_BITSET, VAL, tmout, uaddr2 + 1, VAL3,
333 * 5. uaddr2 - not used
361 * 5. uaddr2 - not used
391 * 5. uaddr2 - not used
408 /* FUTEX_REQUEUE - wake val processes and re-queue rest on uaddr2
414 * 5. uaddr2 - another futex address, to re-queue waiting processes on
419 CHECK_FUTEX(uaddr, FUTEX_REQUEUE, VAL, VAL2, uaddr2, VAL3,
422 uaddr, VAL_PR, VAL2_PR, uaddr2, sprintrc(rc));
426 uaddr2, VAL3, (rc == 0));
428 uaddr, VAL_PR, VAL2_PR, uaddr2, sprintrc(rc));
433 /* FUTEX_CMP_REQUEUE - wake val processes and re-queue rest on uaddr2
440 * 5. uaddr2 - another futex address, to re-queue waiting processes on
445 CHECK_FUTEX(uaddr, FUTEX_CMP_REQUEUE, VAL, VAL2, uaddr2, VAL3,
448 uaddr, VAL_PR, VAL2_PR, uaddr2, VAL3_PR, sprintrc(rc));
451 CHECK_FUTEX(uaddr, FUTEX_CMP_REQUEUE, VAL, VAL2, uaddr2, *uaddr,
454 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
458 VAL2, uaddr2, *uaddr, (rc == 0));
460 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
466 * wake val2 processes waiting for uaddr2 in case
467 * operation encoded in val3 (change of value at uaddr2
469 * constant) succeedes with value at uaddr2. Operation
470 * result is written to value of uaddr2 (in any case).
476 * 5. uaddr2 - another futex address, for conditional wake of
483 * uaddr2. Values available (from 2005 up to
486 * applied to the old value stored in uaddr2
493 * uaddr2 is compared.
549 VAL, i, uaddr2, wake_ops[i].val, (rc == 0));
552 i, uaddr2, wake_ops[i].str, sprintrc(rc));
572 * 5. uaddr2 - not used
578 CHECK_FUTEX_ENOSYS(uaddr + 1, FUTEX_LOCK_PI, VAL, tmout, uaddr2 + 1,
585 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EFAULT));
605 * 5. uaddr2 - not used
609 CHECK_FUTEX_ENOSYS(uaddr + 1, FUTEX_UNLOCK_PI, VAL, tmout, uaddr2 + 1,
614 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EFAULT));
627 * 5. uaddr2 - not used
631 CHECK_FUTEX_ENOSYS(uaddr + 1, FUTEX_TRYLOCK_PI, VAL, tmout, uaddr2 + 1,
636 VAL, tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EFAULT));
653 * 5. uaddr2 - (PI-aware) futex address to requeue process on
659 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_WAIT_REQUEUE_PI, VAL, tmout, uaddr2,
664 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
667 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN));
671 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
674 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN));
678 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
681 FUTEX_WAIT_REQUEUE_PI, VAL, tmout, uaddr2, VAL3,
686 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
695 * 5. uaddr2 - (PI-aware) futex address, to re-queue waiting processes
704 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_CMP_REQUEUE_PI, VAL, VAL2, uaddr2, VAL3,
707 uaddr, VAL_PR, VAL2_PR, uaddr2, VAL3_PR, sprintrc(rc));
709 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_CMP_REQUEUE_PI, VAL, VAL2, uaddr2,
712 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
715 VAL, VAL2, uaddr2, *uaddr, (rc == -1) && (errno == EINVAL));
717 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
726 CHECK_FUTEX(uaddr, 0xd, VAL, tmout + 1, uaddr2 + 1, VAL3,
729 uaddr, VAL_PR, tmout + 1, uaddr2 + 1, VAL3_PR, sprintrc(rc));
731 CHECK_FUTEX(uaddr, 0xbefeeded, VAL, tmout + 1, uaddr2, VAL3,
734 uaddr, VAL_PR, tmout + 1, uaddr2, VAL3_PR, sprintrc(rc));
