Lines Matching refs:Outs
261 const SmallVectorImpl<ISD::OutputArg> &Outs,
271 assert(Outs.size() == 0 && "Kernel must return void.");
274 assert(Outs.size() <= 1 && "Can at most return one value.");
286 assert(Outs.size() < 2 && "Device functions can return at most one value");
288 if (Outs.size() == 1) {
298 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
299 EVT RegVT = Outs[i].VT;
348 const SmallVectorImpl<ISD::OutputArg> &Outs,
362 // The layout of the ops will be [Chain, #Ins, Ins, Callee, #Outs, Outs]
363 Ops.resize(Outs.size() + Ins.size() + 4);
