Lines Matching refs:Custom
263 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom);
266 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom);
279 setOperationAction(ISD::SINT_TO_FP , MVT::i32 , Custom);
281 setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Custom);
282 setOperationAction(ISD::SINT_TO_FP , MVT::i32 , Custom);
289 // In 32-bit mode these are custom lowered. In 64-bit mode F32 and F64
290 // are Legal, f80 is custom lowered.
291 setOperationAction(ISD::FP_TO_SINT , MVT::i64 , Custom);
292 setOperationAction(ISD::SINT_TO_FP , MVT::i64 , Custom);
302 setOperationAction(ISD::FP_TO_SINT , MVT::i32 , Custom);
304 setOperationAction(ISD::FP_TO_SINT , MVT::i16 , Custom);
305 setOperationAction(ISD::FP_TO_SINT , MVT::i32 , Custom);
321 // FIXME: We would like to use a Custom expander here eventually to do
327 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Custom);
361 setOperationAction(ISD::ADDC, VT, Custom);
362 setOperationAction(ISD::ADDE, VT, Custom);
363 setOperationAction(ISD::SUBC, VT, Custom);
364 setOperationAction(ISD::SUBE, VT, Custom);
368 setOperationAction(ISD::BRCOND , MVT::Other, Custom);
380 setOperationAction(ISD::FLT_ROUNDS_ , MVT::i32 , Custom);
385 setOperationAction(ISD::CTTZ , MVT::i8 , Custom);
386 setOperationAction(ISD::CTTZ , MVT::i16 , Custom);
387 setOperationAction(ISD::CTTZ , MVT::i32 , Custom);
389 setOperationAction(ISD::CTTZ , MVT::i64 , Custom);
395 Custom);
396 setOperationAction(ISD::CTLZ , MVT::i16 , Custom);
397 setOperationAction(ISD::CTLZ , MVT::i32 , Custom);
399 setOperationAction(ISD::CTLZ , MVT::i64 , Custom);
412 setOperationAction(ISD::READCYCLECOUNTER , MVT::i64 , Custom);
418 setOperationAction(ISD::SELECT , MVT::i8 , Custom);
419 setOperationAction(ISD::SELECT , MVT::i16 , Custom);
420 setOperationAction(ISD::SELECT , MVT::i32 , Custom);
421 setOperationAction(ISD::SELECT , MVT::f32 , Custom);
422 setOperationAction(ISD::SELECT , MVT::f64 , Custom);
423 setOperationAction(ISD::SELECT , MVT::f80 , Custom);
424 setOperationAction(ISD::SETCC , MVT::i8 , Custom);
425 setOperationAction(ISD::SETCC , MVT::i16 , Custom);
426 setOperationAction(ISD::SETCC , MVT::i32 , Custom);
427 setOperationAction(ISD::SETCC , MVT::f32 , Custom);
428 setOperationAction(ISD::SETCC , MVT::f64 , Custom);
429 setOperationAction(ISD::SETCC , MVT::f80 , Custom);
431 setOperationAction(ISD::SELECT , MVT::i64 , Custom);
432 setOperationAction(ISD::SETCC , MVT::i64 , Custom);
434 setOperationAction(ISD::EH_RETURN , MVT::Other, Custom);
437 setOperationAction(ISD::ConstantPool , MVT::i32 , Custom);
438 setOperationAction(ISD::JumpTable , MVT::i32 , Custom);
439 setOperationAction(ISD::GlobalAddress , MVT::i32 , Custom);
440 setOperationAction(ISD::GlobalTLSAddress, MVT::i32 , Custom);
442 setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom);
443 setOperationAction(ISD::ExternalSymbol , MVT::i32 , Custom);
444 setOperationAction(ISD::BlockAddress , MVT::i32 , Custom);
446 setOperationAction(ISD::ConstantPool , MVT::i64 , Custom);
447 setOperationAction(ISD::JumpTable , MVT::i64 , Custom);
448 setOperationAction(ISD::GlobalAddress , MVT::i64 , Custom);
449 setOperationAction(ISD::ExternalSymbol, MVT::i64 , Custom);
450 setOperationAction(ISD::BlockAddress , MVT::i64 , Custom);
453 setOperationAction(ISD::SHL_PARTS , MVT::i32 , Custom);
454 setOperationAction(ISD::SRA_PARTS , MVT::i32 , Custom);
455 setOperationAction(ISD::SRL_PARTS , MVT::i32 , Custom);
457 setOperationAction(ISD::SHL_PARTS , MVT::i64 , Custom);
458 setOperationAction(ISD::SRA_PARTS , MVT::i64 , Custom);
459 setOperationAction(ISD::SRL_PARTS , MVT::i64 , Custom);
465 setOperationAction(ISD::MEMBARRIER , MVT::Other, Custom);
466 setOperationAction(ISD::ATOMIC_FENCE , MVT::Other, Custom);
478 setOperationAction(ISD::ATOMIC_CMP_SWAP, VT, Custom);
479 setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom);
480 setOperationAction(ISD::ATOMIC_STORE, VT, Custom);
484 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Custom);
485 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i64, Custom);
486 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i64, Custom);
487 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i64, Custom);
488 setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i64, Custom);
489 setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i64, Custom);
490 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i64, Custom);
491 setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, Custom);
495 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i128, Custom);
516 setOperationAction(ISD::FRAME_TO_ARGS_OFFSET, MVT::i32, Custom);
517 setOperationAction(ISD::FRAME_TO_ARGS_OFFSET, MVT::i64, Custom);
519 setOperationAction(ISD::INIT_TRAMPOLINE, MVT::Other, Custom);
520 setOperationAction(ISD::ADJUST_TRAMPOLINE, MVT::Other, Custom);
524 // VASTART needs to be custom lowered to use the VarArgsFrameIndex
525 setOperationAction(ISD::VASTART , MVT::Other, Custom);
528 setOperationAction(ISD::VAARG , MVT::Other, Custom);
529 setOperationAction(ISD::VACOPY , MVT::Other, Custom);
540 MVT::i64 : MVT::i32, Custom);
543 MVT::i64 : MVT::i32, Custom);
555 setOperationAction(ISD::FABS , MVT::f64, Custom);
556 setOperationAction(ISD::FABS , MVT::f32, Custom);
559 setOperationAction(ISD::FNEG , MVT::f64, Custom);
560 setOperationAction(ISD::FNEG , MVT::f32, Custom);
563 setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom);
564 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom);
567 setOperationAction(ISD::FGETSIGN, MVT::i64, Custom);
568 setOperationAction(ISD::FGETSIGN, MVT::i32, Custom);
587 setOperationAction(ISD::FABS , MVT::f32, Custom);
590 setOperationAction(ISD::FNEG , MVT::f32, Custom);
596 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom);
797 setOperationAction(ISD::FNEG, MVT::v4f32, Custom);
799 setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom);
800 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4f32, Custom);
801 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Custom);
802 setOperationAction(ISD::SELECT, MVT::v4f32, Custom);
803 setOperationAction(ISD::SETCC, MVT::v4f32, Custom);
820 setOperationAction(ISD::MUL, MVT::v2i64, Custom);
831 setOperationAction(ISD::FNEG, MVT::v2f64, Custom);
833 setOperationAction(ISD::SETCC, MVT::v2i64, Custom);
834 setOperationAction(ISD::SETCC, MVT::v16i8, Custom);
835 setOperationAction(ISD::SETCC, MVT::v8i16, Custom);
836 setOperationAction(ISD::SETCC, MVT::v4i32, Custom);
838 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Custom);
839 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i16, Custom);
840 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom);
841 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom);
842 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom);
844 setOperationAction(ISD::CONCAT_VECTORS, MVT::v2f64, Custom);
845 setOperationAction(ISD::CONCAT_VECTORS, MVT::v2i64, Custom);
846 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i8, Custom);
847 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i16, Custom);
848 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i32, Custom);
850 // Custom lower build_vector, vector_shuffle, and extract_vector_elt.
853 // Do not attempt to custom lower non-power-of-2 vectors
856 // Do not attempt to custom lower non-128-bit vectors
860 VT.getSimpleVT().SimpleTy, Custom);
862 VT.getSimpleVT().SimpleTy, Custom);
864 VT.getSimpleVT().SimpleTy, Custom);
867 setOperationAction(ISD::BUILD_VECTOR, MVT::v2f64, Custom);
868 setOperationAction(ISD::BUILD_VECTOR, MVT::v2i64, Custom);
869 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Custom);
870 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Custom);
871 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2f64, Custom);
872 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f64, Custom);
875 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i64, Custom);
876 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i64, Custom);
902 // Custom lower v2i64 and v2f64 selects.
905 setOperationAction(ISD::SELECT, MVT::v2f64, Custom);
906 setOperationAction(ISD::SELECT, MVT::v2i64, Custom);
928 setOperationAction(ISD::SHL, MVT::v4i32, Custom);
929 setOperationAction(ISD::SHL, MVT::v16i8, Custom);
937 // i8 and i16 vectors are custom , because the source register and source
939 // custom since the immediate controlling the insert encodes additional
941 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i8, Custom);
942 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom);
943 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom);
944 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom);
946 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v16i8, Custom);
947 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v8i16, Custom);
948 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4i32, Custom);
949 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Custom);
958 setOperationAction(ISD::SRL, MVT::v2i64, Custom);
959 setOperationAction(ISD::SRL, MVT::v4i32, Custom);
960 setOperationAction(ISD::SRL, MVT::v16i8, Custom);
961 setOperationAction(ISD::SRL, MVT::v8i16, Custom);
963 setOperationAction(ISD::SHL, MVT::v2i64, Custom);
964 setOperationAction(ISD::SHL, MVT::v4i32, Custom);
965 setOperationAction(ISD::SHL, MVT::v8i16, Custom);
967 setOperationAction(ISD::SRA, MVT::v4i32, Custom);
968 setOperationAction(ISD::SRA, MVT::v8i16, Custom);
972 setOperationAction(ISD::SETCC, MVT::v2i64, Custom);
991 setOperationAction(ISD::FNEG, MVT::v8f32, Custom);
998 setOperationAction(ISD::FNEG, MVT::v4f64, Custom);
1004 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4f64, Custom);
1005 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i64, Custom);
1006 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f32, Custom);
1007 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i32, Custom);
1008 setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i8, Custom);
1009 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i16, Custom);
1011 setOperationAction(ISD::SRL, MVT::v4i64, Custom);
1012 setOperationAction(ISD::SRL, MVT::v8i32, Custom);
1013 setOperationAction(ISD::SRL, MVT::v16i16, Custom);
1014 setOperationAction(ISD::SRL, MVT::v32i8, Custom);
1016 setOperationAction(ISD::SHL, MVT::v4i64, Custom);
1017 setOperationAction(ISD::SHL, MVT::v8i32, Custom);
1018 setOperationAction(ISD::SHL, MVT::v16i16, Custom);
1019 setOperationAction(ISD::SHL, MVT::v32i8, Custom);
1021 setOperationAction(ISD::SRA, MVT::v8i32, Custom);
1022 setOperationAction(ISD::SRA, MVT::v16i16, Custom);
1024 setOperationAction(ISD::SETCC, MVT::v32i8, Custom);
1025 setOperationAction(ISD::SETCC, MVT::v16i16, Custom);
1026 setOperationAction(ISD::SETCC, MVT::v8i32, Custom);
1027 setOperationAction(ISD::SETCC, MVT::v4i64, Custom);
1029 setOperationAction(ISD::SELECT, MVT::v4f64, Custom);
1030 setOperationAction(ISD::SELECT, MVT::v4i64, Custom);
1031 setOperationAction(ISD::SELECT, MVT::v8f32, Custom);
1038 setOperationAction(ISD::ADD, MVT::v4i64, Custom);
1039 setOperationAction(ISD::ADD, MVT::v8i32, Custom);
1040 setOperationAction(ISD::ADD, MVT::v16i16, Custom);
1041 setOperationAction(ISD::ADD, MVT::v32i8, Custom);
1043 setOperationAction(ISD::SUB, MVT::v4i64, Custom);
1044 setOperationAction(ISD::SUB, MVT::v8i32, Custom);
1045 setOperationAction(ISD::SUB, MVT::v16i16, Custom);
1046 setOperationAction(ISD::SUB, MVT::v32i8, Custom);
1048 setOperationAction(ISD::MUL, MVT::v4i64, Custom);
1049 Custom);
1050 setOperationAction(ISD::MUL, MVT::v16i16, Custom);
1053 // Custom lower several nodes for 256-bit types.
1062 setOperationAction(ISD::EXTRACT_SUBVECTOR, SVT, Custom);
1064 // Do not attempt to custom lower other non-256-bit vectors
1068 setOperationAction(ISD::BUILD_VECTOR, SVT, Custom);
1069 setOperationAction(ISD::VECTOR_SHUFFLE, SVT, Custom);
1070 setOperationAction(ISD::INSERT_VECTOR_ELT, SVT, Custom);
1071 setOperationAction(ISD::EXTRACT_VECTOR_ELT, SVT, Custom);
1072 setOperationAction(ISD::SCALAR_TO_VECTOR, SVT, Custom);
1073 setOperationAction(ISD::INSERT_SUBVECTOR, SVT, Custom);
1099 // of this type with custom code.
1102 setOperationAction(ISD::SIGN_EXTEND_INREG, (MVT::SimpleValueType)VT, Custom);
1105 // We want to custom lower some of our intrinsics.
1106 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
1109 // Only custom-lower 64-bit SADDO and friends on 64-bit because we don't
1112 // FIXME: We really should do custom legalization for addition and
1116 // Add/Sub/Mul with overflow operations are custom lowered.
1118 setOperationAction(ISD::SADDO, VT, Custom);
1119 setOperationAction(ISD::UADDO, VT, Custom);
1120 setOperationAction(ISD::SSUBO, VT, Custom);
1121 setOperationAction(ISD::USUBO, VT, Custom);
1122 setOperationAction(ISD::SMULO, VT, Custom);
1123 setOperationAction(ISD::UMULO, VT, Custom);
4803 /// LowerBuildVectorv16i8 - Custom lower build_vector of v16i8.
4850 /// LowerBuildVectorv8i16 - Custom lower build_vector of v8i16.
7822 // Since UINT_TO_FP is legal (it's marked custom), dag combiner won't
8085 // type, and that won't be f80 since that is not custom lowered.
9134 default: return SDValue(); // Don't custom lower most intrinsics.
10300 Subtarget->hasMMX() && "Unexpected custom BITCAST");
10303 "Unexpected custom BITCAST");
10383 /// LowerOperation - Provide custom lowering hooks for some operations.
10387 default: llvm_unreachable("Should not custom lower this!");
10503 /// with a new node built out of custom code.
10510 assert(false && "Do not know how to custom type legalize this operation!");
