Lines Matching full:vr128
67 def VR128 : RegisterClass<[v2i64, v2f64],
98 !subst(REGCLASS, VR128,
103 !subst(REGCLASS, VR128,
107 def PS : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
110 def PD : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
120 // CHECK: [(set VR128:$dst, (int_x86_sse2_add_pd VR128:$src1, VR128:$src2))]
121 // CHECK: [(set VR128:$dst, (int_x86_sse2_add_ps VR128:$src1, VR128:$src2))]
