Lines Matching defs:Src0
306 Operand *Src0 = Instr->getSrc(0);
316 Context.insert<InstExtractElement>(Op0, Src0, Index);
333 Operand *Src0 = Instr->getSrc(0);
335 const Type SrcType = Src0->getType();
344 Context.insert<InstExtractElement>(Op0, Src0, Index);
421 Operand *Src0 = Instr->getSrc(0);
422 const Type SrcTy = Src0->getType();
435 Context.insert<InstExtractElement>(Op, Src0, Index);
475 Call->addArg(Src0);
504 Call->addArg(Src0);
532 Context.insert<InstCast>(InstCast::Zext, Src0AsI32, Src0);
533 Src0 = Src0AsI32;
540 Context.insert<InstCast>(InstCast::Zext, Src0AsI32, Src0);
541 Src0 = Src0AsI32;
546 Call->addArg(Src0);
587 Operand *Src0 = IntrinsicCall->getArg(0);
605 Context.insert<InstExtractElement>(Op, Src0, Index);
746 Operand *Src0 = IntrinsicCall->getArg(0);
748 Ctx->getRuntimeHelperFunc(isInt32Asserting32Or64(Src0->getType())
754 Call->addArg(Src0);
2177 Operand *Src0 = NumSrcs < 1 ? nullptr : CurInstr->getSrc(0);
2179 auto *Src0V = llvm::dyn_cast_or_null<Variable>(Src0);
2180 auto *Src0M = llvm::dyn_cast_or_null<OperandMIPS32Mem>(Src0);
2466 Variable *Dest, Operand *Src0,
2481 Src0LoR = legalizeToReg(loOperand(Src0));
2483 Src0HiR = legalizeToReg(hiOperand(Src0));
2496 Src0LoR = legalizeToReg(loOperand(Src0));
2498 Src0HiR = legalizeToReg(hiOperand(Src0));
2508 Src0LoR = legalizeToReg(loOperand(Src0));
2510 Src0HiR = legalizeToReg(hiOperand(Src0));
2523 Src0LoR = legalizeToReg(loOperand(Src0));
2525 Src0HiR = legalizeToReg(hiOperand(Src0));
2535 Src0LoR = legalizeToReg(loOperand(Src0));
2537 Src0HiR = legalizeToReg(hiOperand(Src0));
2549 Src0LoR = legalizeToReg(loOperand(Src0));
2551 Src0HiR = legalizeToReg(hiOperand(Src0));
2580 Src0LoR = legalizeToReg(loOperand(Src0));
2583 Src0HiR = legalizeToReg(hiOperand(Src0));
2589 Src0HiR = legalizeToReg(hiOperand(Src0));
2606 Src0LoR = legalizeToReg(loOperand(Src0));
2608 Src0HiR = legalizeToReg(hiOperand(Src0));
2639 Src0HiR = legalizeToReg(hiOperand(Src0));
2642 Src0LoR = legalizeToReg(loOperand(Src0));
2659 Src0LoR = legalizeToReg(loOperand(Src0));
2661 Src0HiR = legalizeToReg(hiOperand(Src0));
2693 Src0HiR = legalizeToReg(hiOperand(Src0));
2696 Src0LoR = legalizeToReg(loOperand(Src0));
2713 Src0LoR = legalizeToReg(loOperand(Src0));
2715 Src0HiR = legalizeToReg(hiOperand(Src0));
2762 Operand *Src0 = legalizeUndef(Instr->getSrc(0));
2765 lowerInt64Arithmetic(Instr, Instr->getDest(), Src0, Src1);
2774 Variable *Src0R = legalizeToReg(Src0);
3059 Operand *Src0 = legalizeUndef(Instr->getSrc(0));
3064 legalize(getOperandAtIndex(Src0, IceType_i32, i), Legal_Reg);
3071 Operand *Src0 = Instr->getSrc(0);
3072 assert(Dest->getType() == Src0->getType());
3074 Src0 = legalizeUndef(Src0);
3075 Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg);
3076 Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg);
3091 SrcR = legalize(Src0, Legal_Reg, Dest->getRegNum());
3096 SrcR = legalize(Src0, Legal_Reg);
3120 Operand *Src0 = CompareInst->getSrc(0);
3122 const Type Src0Ty = Src0->getType();
3130 Src0R = legalizeToReg(loOperand(Src0));
3132 Src0HiR = legalizeToReg(hiOperand(Src0));
3135 auto *Src0RT = legalizeToReg(Src0);
3643 Operand *Src0 = legalizeUndef(Instr->getSrc(0));
3645 const Type Src0Ty = Src0->getType();
3667 Variable *Src0R = legalizeToReg(Src0);
3689 Variable *Src0R = legalizeToReg(Src0);
3705 Variable *Src0R = legalizeToReg(Src0);
3721 Variable *Src0R = legalizeToReg(Src0);
3733 Src0 = loOperand(Src0);
3734 Variable *Src0R = legalizeToReg(Src0);
3755 assert(Src0->getType() == IceType_f64);
3757 auto *Src0R = legalizeToReg(Src0);
3764 assert(Src0->getType() == IceType_f32);
3766 auto *Src0R = legalizeToReg(Src0);
3779 Variable *Src0R = legalizeToReg(Src0);
3786 Variable *Src0R = legalizeToReg(Src0);
3803 Variable *Src0R = legalizeToReg(Src0);
3833 Operand *Src0 = Instr->getSrc(0);
3834 if (DestTy == Src0->getType()) {
3835 auto *Assign = InstAssign::create(Func, Dest, Src0);
3839 if (isVectorType(DestTy) || isVectorType(Src0->getType())) {
3852 assert(Src0->getType() == IceType_v8i1);
3857 assert(Src0->getType() == IceType_v16i1);
3863 Variable *Src0R = legalizeToReg(Src0);
3868 assert(Src0->getType() == IceType_f64);
3869 Variable *Src0R = legalizeToReg(Src0);
3882 assert(Src0->getType() == IceType_i64);
3884 if (auto *C64 = llvm::dyn_cast<ConstantInteger64>(Src0)) {
3893 auto *Var64On32 = llvm::cast<Variable64On32>(Src0);
3916 auto *Src0 = legalizeUndef(Instr->getSrc(0));
3917 auto *Src0R = llvm::dyn_cast<VariableVecOn32>(Src0);
3920 typeNumElements(Src0->getType()) / Src0R->ContainersPerVector;
3979 auto *Src0 = Instr->getSrc(0);
3985 auto *Src0R = legalizeToReg(Src0);
3987 const Type Src0Ty = Src0->getType();
4168 Operand *Src0 = legalize(Instr->getSrc(0));
4173 Variable *Src0LoR = legalizeToReg(loOperand(Src0));
4174 Variable *Src0HiR = legalizeToReg(hiOperand(Src0));
4314 auto *Src0 = Instr->getSrc(0);
4316 if (Src0->getType() == IceType_i64) {
4326 auto *Src0R = legalizeToReg(Src0);
4329 const uint32_t ShAmt = INT32_BITS - getScalarIntBitWidth(Src0->getType());
4428 auto *Src0 = legalizeUndef(Instr->getSrc(0));
4429 auto *Src0R = llvm::dyn_cast<VariableVecOn32>(Src0);
4432 typeNumElements(Src0->getType()) / Src0R->ContainersPerVector;
4539 Variable *Dest, Variable *Src0,
4547 _addu(Dest, Src0, Src1);
4550 _and(Dest, Src0, Src1);
4553 _subu(Dest, Src0, Src1);
4556 _or(Dest, Src0, Src1);
4559 _xor(Dest, Src0, Src1);
5213 Operand *Src0 = formMemoryOperand(Instr->getSourceAddress(), Ty);
5215 auto *Assign = InstAssign::create(Func, DestLoad, Src0);
5311 Operand *Src0 = ArithInst->getSrc(0);
5313 auto *Var0 = llvm::dyn_cast<Variable>(Src0);
5315 auto *Const0 = llvm::dyn_cast<ConstantInteger32>(Src0);
5321 assert(llvm::isa<ConstantRelocatable>(Src0));
5462 Operand *Src0 = Instr->getRetValue();
5463 switch (Src0->getType()) {
5465 Operand *Src0F = legalizeToReg(Src0);
5471 Operand *Src0F = legalizeToReg(Src0);
5480 Operand *Src0F = legalizeToReg(Src0);
5486 Src0 = legalizeUndef(Src0);
5487 Variable *R0 = legalizeToReg(loOperand(Src0), RegMIPS32::Reg_V0);
5488 Variable *R1 = legalizeToReg(hiOperand(Src0), RegMIPS32::Reg_V1);
5499 auto *SrcVec = llvm::dyn_cast<VariableVecOn32>(legalizeUndef(Src0));
5515 auto *SrcVec = llvm::dyn_cast<VariableVecOn32>(legalizeUndef(Src0));
