Lines Matching refs:Variable
101 /// Instr is the instruction producing the i1-type variable of interest.
157 /// Producers maps Variable::Number to a BoolFoldingEntry.
262 Variable *Var = Instr.getDest();
270 // Check each src variable against the map.
323 auto *Var = llvm::dyn_cast<const Variable>(Opnd);
357 /// sees the variable's definitive last use (indicating the variable is not in
541 // liveness analysis. Loops must be identified before liveness so variable
739 // variable and is now subject to dead code elimination if there are no
740 // more uses of "b". Variable "x" is a beacon for determining whether the
777 Variable *Beacon = Func->makeVariable(IceType_i32);
803 inline bool canFoldLoadIntoBinaryInst(Operand *LoadSrc, Variable *LoadDest,
821 Variable *LoadDest = nullptr;
849 // if the following instruction ends the Load's Dest variable's live
884 auto *Src0 = llvm::dyn_cast<Variable>(Cast->getSrc(0));
915 Variable *TargetX86Base<TraitsType>::getPhysicalRegister(RegNumT RegNum,
922 Variable
945 void TargetX86Base<TraitsType>::emitVariable(const Variable *Var) const {
958 llvm::report_fatal_error("Infinite-weight Variable (" + Var->getName() +
979 TargetX86Base<TraitsType>::stackVarToAsmOperand(const Variable *Var) const {
981 llvm::report_fatal_error("Stack Variable has a register assigned");
983 llvm::report_fatal_error("Infinite-weight Variable (" + Var->getName() +
1033 // Determine stack frame offsets for each Variable without a register
1034 // assignment. This can be done as one variable per stack slot. Or, do
1051 // it counts any variable not counted by GlobalsSize.
1058 // A spill slot linked to a variable with a stack slot should reuse that
1060 std::function<bool(Variable *)> TargetVarHook =
1061 [&VariablesLinkedToSpillSlots](Variable *Var) {
1063 Variable *Root = Var->getLinkedToStackRoot();
1184 Variable *FramePtr = getPhysicalRegister(FrameOrStackReg, Traits::WordType);
1196 for (Variable *Arg : Args) {
1235 for (Variable *Var : VariablesLinkedToSpillSlots) {
1236 const Variable *Root = Var->getLinkedToStackRoot();
1282 Variable *Arg, Variable *FramePtr, size_t BasicFrameOffset,
1286 Variable *Lo = Arg64On32->getLo();
1287 Variable *Hi = Arg64On32->getHi();
1312 // operand instead of a Variable, so its fill-from-stack operation has to
1370 auto *RetValue = llvm::cast<Variable>(RI->getSrc(0));
1484 Variable *esp = getPhysicalRegister(getStackReg(), Traits::WordType);
1489 Variable *Dest = Instr->getDest();
1509 Variable *T = nullptr;
1525 Variable *T = makeReg(IceType_i32);
1549 Variable *Arg = Args[i];
1551 Variable *RegisterArg = nullptr;
1594 // from the pre-colored variable, so that a subsequent availabilityGet()
1600 Variable *Tmp = makeReg(RegisterArg->getType());
1615 bool TargetX86Base<TraitsType>::optimizeScalarMul(Variable *Dest, Operand *Src0,
1623 Variable *T = nullptr;
1634 Variable *T = nullptr;
1681 Variable *T = makeReg(Traits::WordType);
1713 Operand *Src1Lo, Variable *DestLo,
1714 Variable *DestHi) {
1716 Variable *T_1 = nullptr, *T_2 = nullptr, *T_3 = nullptr;
1925 Variable *Dest = Instr->getDest();
1935 if (!llvm::isa<Variable>(Src0) && llvm::isa<Variable>(Src1)) {
1970 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
1971 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
1976 Variable *T_Lo = nullptr, *T_Hi = nullptr;
2022 Variable *T_1 = nullptr, *T_2 = nullptr, *T_3 = nullptr;
2023 Variable *T_4Lo = makeReg(IceType_i32, Traits::RegisterSet::Reg_eax);
2024 Variable *T_4Hi = makeReg(IceType_i32, Traits::RegisterSet::Reg_edx);
2084 Variable *T = makeReg(Ty);
2090 Variable *T = makeReg(Ty);
2096 Variable *T = makeReg(Ty);
2102 Variable *T = makeReg(Ty);
2108 Variable *T = makeReg(Ty);
2118 Variable *T = makeReg(Ty);
2148 Variable *T1 = makeReg(IceType_v4i32);
2149 Variable *T2 = makeReg(IceType_v4i32);
2150 Variable *T3 = makeReg(IceType_v4i32);
2151 Variable *T4 = makeReg(IceType_v4i32);
2168 Variable *T = makeReg(Ty);
2175 Variable *T = makeReg(Ty);
2182 Variable *T = makeReg(Ty);
2194 Variable *T = makeReg(Ty);
2200 Variable *T = makeReg(Ty);
2206 Variable *T = makeReg(Ty);
2212 Variable *T = makeReg(Ty);
2223 Variable *T_edx = nullptr;
2224 Variable *T = nullptr;
2553 Variable *Dest = Instr->getDest();
2651 Variable *esp = getPhysicalRegister(getStackReg(), Traits::WordType);
2659 Variable *Dest = Instr->getDest();
2699 Context.insert<InstFakeUse>(llvm::cast<Variable>(Arg));
2702 Context.insert<InstFakeUse>(llvm::cast<Variable>(ArgPair.second));
2707 Variable *ReturnReg = nullptr;
2708 Variable *ReturnRegHi = nullptr;
2778 Variable *Tmp = nullptr;
2796 Variable *DestLo = Dest64On32->getLo();
2797 Variable *DestHi = Dest64On32->getHi();
2800 Variable *TmpHi = nullptr;
2814 Variable *Dest = Instr->getDest();
2831 Variable *OneMask = makeVectorOfOnes(DestTy);
2832 Variable *T = makeReg(DestTy);
2835 Variable *Zeros = makeVectorOfZeros(DestTy);
2844 Variable *T = makeReg(DestTy);
2853 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
2854 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
2855 Variable *T_Lo = makeReg(DestLo->getType());
2866 Variable *T_Hi = nullptr;
2879 Variable *T = makeReg(DestTy);
2892 Variable *T = makeReg(DestTy);
2902 Variable *OneMask = makeVectorOfOnes(DestTy);
2903 Variable *T = makeReg(DestTy);
2910 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
2911 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
2912 Variable *Tmp = makeReg(DestLo->getType());
2922 Variable *T = nullptr;
2937 Variable *T = makeReg(DestTy);
2948 Variable *OneMask = makeVectorOfOnes(Src0Ty);
2949 Variable *T = makeReg(DestTy);
2959 Variable *T = copyToReg8(Src0RM);
2969 Variable *T = makeReg(DestTy);
2979 Variable *T = makeReg(DestTy);
2989 Variable *T = makeReg(DestTy);
2997 Variable *T_1 = nullptr;
3005 Variable *T_2 = makeReg(DestTy);
3028 Variable *T_1 = nullptr;
3035 Variable *T_2 = makeReg(DestTy);
3053 Variable *T = makeReg(DestTy);
3062 Variable *T_1 = nullptr;
3069 Variable *T_2 = makeReg(DestTy);
3089 Variable *T_1 = nullptr;
3097 Variable *T_2 = makeReg(DestTy);
3125 Variable *Src0R = legalizeToReg(Src0);
3126 Variable *T = makeReg(DestTy);
3133 Variable *Src0R = legalizeToReg(Src0);
3134 Variable *T = makeReg(IceType_i64);
3146 if (auto *Src0Var = llvm::dyn_cast<Variable>(Src0RM)) {
3147 Variable *Spill = Func->makeVariable(IceType_f64);
3160 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
3161 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
3162 Variable *T_Lo = makeReg(IceType_i32);
3163 Variable *T_Hi = makeReg(IceType_i32);
3175 Variable *T = makeReg(IceType_f64);
3181 Variable *T = makeReg(DestTy);
3193 Variable *Spill = Func->makeVariable(IceType_f64);
3197 Variable *T_Lo = nullptr, *T_Hi = nullptr;
3256 Variable *ExtractedElementR =
3264 Variable *SourceVectR = legalizeToReg(SourceVectNotLegalized);
3268 Variable *T = nullptr;
3296 Variable *Slot = Func->makeVariable(Ty);
3309 Variable *T = makeReg(IceType_i1);
3317 Variable *Dest = Instr->getDest();
3323 Variable *Dest = Fcmp->getDest();
3338 Variable *Dest = Fcmp->getDest();
3376 Variable *T = nullptr;
3420 Variable *SelectDest = Select->getDest();
3443 Variable *Dest = Fcmp->getDest();
3454 Variable *T = nullptr;
3478 Variable *T2 = makeReg(Src0RM->getType());
3488 Variable *T2 = makeReg(Src0RM->getType());
3516 Variable *Dest = Icmp->getDest();
3553 Variable *Dest = Icmp->getDest();
3576 Variable *NewSrc0 = Func->makeVariable(NewTy);
3577 Variable *NewSrc1 = Func->makeVariable(NewTy);
3595 Variable *T0 = makeReg(Ty);
3596 Variable *T1 = makeReg(Ty);
3597 Variable *HighOrderBits = makeVectorOfHighOrderBits(Ty);
3606 Variable *T = makeReg(Ty);
3622 Variable *MinusOne = makeVectorOfMinusOnes(Ty);
3639 Variable *MinusOne = makeVectorOfMinusOnes(Ty);
3656 Variable *MinusOne = makeVectorOfMinusOnes(Ty);
3673 Variable *Dest = Icmp->getDest();
3714 Variable *Temp = nullptr;
3792 Variable *SelectDest = Select->getDest();
3814 Variable *Dest,
3827 Variable *SelectDest = Select->getDest();
3835 void TargetX86Base<TraitsType>::movOrConsumer(bool IcmpResult, Variable *Dest,
3857 Variable *SelectDest = Select->getDest();
3867 Variable *T = nullptr;
3870 Variable *Dest = Arith->getDest();
3921 Variable *Expanded = Func->makeVariable(InVectorElementTy);
3935 Variable *T = makeReg(Ty);
3947 llvm::isa<Variable>(ElementRM)) {
3956 Variable *ElementR = nullptr;
3971 Variable *T = makeReg(Ty);
4010 Variable *T = makeReg(Ty);
4022 Variable *Slot = Func->makeVariable(Ty);
4032 Variable *T = makeReg(Ty);
4049 Variable *DestPrev = Instr->getDest();
4077 Variable *Dest = Instr->getDest();
4110 Variable *Dest = Instr->getDest();
4118 Variable *T = makeReg(IceType_f64);
4165 Variable *T = makeReg(IceType_f64);
4180 Variable *Dest = Instr->getDest();
4186 Variable *T_Lo = legalizeToReg(loOperand(Val));
4187 Variable *T_Hi = legalizeToReg(hiOperand(Val));
4188 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
4189 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
4196 Variable *T = legalizeToReg(Val);
4202 Variable *T = nullptr;
4211 Variable *Dest = Instr->getDest();
4212 Variable *T = nullptr;
4225 Variable *V = makeReg(IceType_i64);
4247 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
4266 Variable *T_1 = makeReg(IceType_i32);
4268 Variable *T_2 = makeReg(IceType_i64);
4311 Variable *Dest = Instr->getDest();
4312 Variable *T = makeVectorOfFabsMask(Ty);
4351 Variable *Dest = Instr->getDest();
4352 Variable *T = nullptr;
4373 Variable *Dest = Instr->getDest();
4374 Variable *T = makeReg(Dest->getType());
4381 Variable *esp = Func->getTarget()->getPhysicalRegister(getStackReg(),
4383 Variable *Dest = Instr->getDest();
4387 Variable *esp = Func->getTarget()->getPhysicalRegister(
4389 Variable *Dest = Instr->getDest();
4406 Variable *Dest = Instr->getDest();
4460 Variable *Dest = Instr->getDest();
4472 Variable *Dest = Instr->getDest();
4483 Variable *Dest = Instr->getDest();
4484 Variable *T = makeReg(IceType_i32);
4499 Variable *Dest = Instr->getDest();
4511 Variable *Dest = Instr->getDest();
4523 Variable *Dest = Instr->getDest();
4535 Variable *Dest = Instr->getDest();
4547 Variable *Dest = Instr->getDest();
4559 Variable *Dest = Instr->getDest();
4571 Variable *Dest = Instr->getDest();
4582 Variable *Dest = Instr->getDest();
4588 Variable *T = makeReg(DestTy);
4596 Variable *T_1 = nullptr;
4604 Variable *T_2 = makeReg(DestTy);
4620 Variable *Dest = Instr->getDest();
4642 void TargetX86Base<TraitsType>::lowerAtomicCmpxchg(Variable *DestPrev,
4650 Variable *T_edx = makeReg(IceType_i32, Traits::RegisterSet::Reg_edx);
4651 Variable *T_eax = makeReg(IceType_i32, Traits::RegisterSet::Reg_eax);
4652 Variable *T_ecx = makeReg(IceType_i32, Traits::RegisterSet::Reg_ecx);
4653 Variable *T_ebx = makeReg(IceType_i32, Traits::RegisterSet::Reg_ebx);
4661 auto *DestLo = llvm::cast<Variable>(loOperand(DestPrev));
4662 auto *DestHi = llvm::cast<Variable>(hiOperand(DestPrev));
4684 Variable *T_eax = makeReg(Ty, Eax);
4687 Variable *DesiredReg = legalizeToReg(Desired);
4694 bool TargetX86Base<TraitsType>::tryOptimizedCmpxchgCmpBr(Variable *Dest,
4770 void TargetX86Base<TraitsType>::lowerAtomicRMW(Variable *Dest,
4791 Variable *T = nullptr;
4806 Variable *T = nullptr;
4843 Variable *T = nullptr;
4858 Variable *Dest,
4888 Variable *T_edx = makeReg(IceType_i32, Traits::RegisterSet::Reg_edx);
4889 Variable *T_eax = makeReg(IceType_i32, Traits::RegisterSet::Reg_eax);
4893 Variable *T_ecx = makeReg(IceType_i32, Traits::RegisterSet::Reg_ecx);
4894 Variable *T_ebx = makeReg(IceType_i32, Traits::RegisterSet::Reg_ebx);
4915 // If Val is a variable, model the extended live range of Val through
4917 if (auto *ValVar = llvm::dyn_cast<Variable>(Val)) {
4918 auto *ValLo = llvm::cast<Variable>(loOperand(ValVar));
4919 auto *ValHi = llvm::cast<Variable>(hiOperand(ValVar));
4929 if (Variable *Base = Addr->getBase())
4931 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
4932 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
4955 Variable *T_eax = makeReg(Ty, Eax);
4960 Variable *T = makeReg(Ty);
4966 // If Val is a variable, model the extended live range of Val through
4968 if (auto *ValVar = llvm::dyn_cast<Variable>(Val)) {
4972 if (Variable *Base = Addr->getBase())
4983 Variable *Dest,
5018 Variable *T = makeReg(DestTy);
5025 Variable *T_Dest = makeReg(DestTy);
5060 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
5061 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
5062 // Will be using "test" on this, so we need a registerized variable.
5063 Variable *SecondVar = legalizeToReg(SecondVal);
5064 Variable *T_Dest2 = makeReg(IceType_i32);
5078 void TargetX86Base<TraitsType>::typedLoad(Type Ty, Variable *Dest,
5079 Variable *Base, Constant *Offset) {
5096 void TargetX86Base<TraitsType>::typedStore(Type Ty, Variable *Value,
5097 Variable *Base, Constant *Offset) {
5114 void TargetX86Base<TraitsType>::copyMemory(Type Ty, Variable *Dest,
5115 Variable *Src, int32_t OffsetAmt) {
5118 Variable *Data = makeReg(Ty);
5141 Variable *SrcBase = legalizeToReg(Src);
5142 Variable *DestBase = legalizeToReg(Dest);
5195 Variable *SrcBase = legalizeToReg(Src);
5196 Variable *DestBase = legalizeToReg(Dest);
5198 std::tuple<Type, Constant *, Variable *>
5201 Variable *Reg;
5274 Variable *Base = nullptr;
5275 Variable *VecReg = nullptr;
5349 Variable *ValExtVar = Func->makeVariable(stackSlotType());
5370 int32_t Offset, const Variable *Base,
5371 const Variable *Index, uint16_t Shift,
5374 inline const Inst *matchAssign(Variable **Var,
5378 inline const Inst *matchCombinedBaseIndex(Variable **Base, Variable **Index,
5381 inline const Inst *matchShiftedIndex(Variable **Index, uint16_t *Shift);
5383 inline const Inst *matchOffsetIndexOrBase(Variable **IndexOrBase,
5402 const Variable *Base, const Variable *Index, uint16_t Shift,
5426 const Inst *AddressOptimizer::matchAssign(Variable **Var,
5437 if (auto *SrcVar = llvm::dyn_cast<Variable>(SrcOp)) {
5466 const Inst *AddressOptimizer::matchCombinedBaseIndex(Variable **Base,
5467 Variable **Index,
5481 if (auto *Var1 = llvm::dyn_cast<Variable>(BaseInst->getSrc(0))) {
5484 if (auto *Var2 = llvm::dyn_cast<Variable>(BaseInst->getSrc(1))) {
5500 const Inst *AddressOptimizer::matchShiftedIndex(Variable **Index,
5517 if (auto *Var = llvm::dyn_cast<Variable>(CastInst->getSrc(0))) {
5529 if (auto *Var = llvm::dyn_cast<Variable>(ArithInst->getSrc(0))) {
5587 Variable **IndexOrBase, const uint16_t Shift,
5623 auto *Var0 = llvm::dyn_cast<Variable>(Src0);
5624 auto *Var1 = llvm::dyn_cast<Variable>(Src1);
5632 Variable *Var = nullptr;
5678 Variable *NewIndexOrBase = nullptr;
5740 NewAddr.Base = llvm::dyn_cast<Variable>(Addr);
5746 // would change a variable that is currently *not* live across basic block
5938 /// simple global variable address.
5949 // At this point Opnd could be nullptr, or Variable, or Constant, or perhaps
5950 // something else. We only care if it is Variable.
5951 auto *Var = llvm::dyn_cast_or_null<Variable>(Opnd);
5974 Variable *DestLoad = Load->getDest();
5992 auto *Var0 = llvm::dyn_cast<Variable>(Icmp->getSrc(0));
6003 auto *Var1 = llvm::dyn_cast<Variable>(Icmp->getSrc(1));
6019 Variable *Dest = Instr->getDest();
6030 Variable *Dest = Intrinsic->getDest();
6059 Variable *Reg = nullptr;
6085 Variable *TargetX86Base<TraitsType>::lowerShuffleVector_AllFromSameSrc(
6103 Variable *TargetX86Base<TraitsType>::lowerShuffleVector_TwoFromSameSrc(
6124 Variable *TargetX86Base<TraitsType>::lowerShuffleVector_UnifyFromDifferentSrcs(
6184 Variable *Dest, Operand *Src0, Operand *Src1, int8_t Idx0, int8_t Idx1,
6190 static constexpr Variable *NoBase = nullptr;
6410 Variable *T = nullptr;
6627 Variable *Dest = Select->getDest();
6663 void TargetX86Base<TraitsType>::lowerSelectMove(Variable *Dest, BrCond Cond,
6691 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
6694 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
6705 void TargetX86Base<TraitsType>::lowerSelectIntMove(Variable *Dest, BrCond Cond,
6708 Variable *T = nullptr;
6717 void TargetX86Base<TraitsType>::lowerMove(Variable *Dest, Operand *Src,
6725 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
6726 auto *DestHi = llvm::cast<Variable>(hiOperand(Dest));
6727 Variable *T_Lo = nullptr, *T_Hi = nullptr;
6759 Variable *SelectDest = Select->getDest();
6775 Variable *T = makeReg(SelectDest->getType());
6788 Variable *T = makeReg(SelectSrcT->getType());
6806 Variable *Dest = Icmp->getDest();
6817 Variable *Dest = Instr->getDest();
6827 Variable *T = makeReg(SrcTy);
6839 Variable *xmm0 = makeReg(IceType_v4i32, Traits::RegisterSet::Reg_xmm0);
6849 Variable *xmm0 = makeReg(SignExtTy, Traits::RegisterSet::Reg_xmm0);
6862 Variable *T2 = makeReg(SrcTy);
6866 Variable *T3 = Func->makeVariable(IceType_v4i32);
6947 Variable *T = nullptr;
6981 Variable *Index;
6997 constexpr Variable *NoBase = nullptr;
7004 Variable *Target = nullptr;
7109 Variable *Comparison = legalizeToReg(Src0);
7197 Variable *SignExtendedResult) {
7227 // If the beacon variable's live range does not end in this instruction, then
7356 Variable *Dest = Arith->getDest();
7376 Variable *Dest = Arith->getDest();
7425 Variable *Dest = Cast->getDest();
7428 Variable *CallDest = Dest;
7513 Variable *Src0AsI32 = Func->makeVariable(stackSlotType());
7521 Variable *Src0AsI32 = Func->makeVariable(stackSlotType());
7647 Variable *Dest = Instr->getDest();
7654 Variable *TargetX86Base<TraitsType>::makeZeroedRegister(Type Ty,
7656 Variable *Reg = makeReg(Ty, RegNum);
7689 Variable *TargetX86Base<TraitsType>::makeVectorOfZeros(Type Ty,
7695 Variable *TargetX86Base<TraitsType>::makeVectorOfMinusOnes(Type Ty,
7697 Variable *MinusOnes = makeReg(Ty, RegNum);
7712 Variable *TargetX86Base<TraitsType>::makeVectorOfOnes(Type Ty, RegNumT RegNum) {
7713 Variable *Dest = makeVectorOfZeros(Ty, RegNum);
7714 Variable *MinusOne = makeVectorOfMinusOnes(Ty);
7720 Variable *TargetX86Base<TraitsType>::makeVectorOfHighOrderBits(Type Ty,
7725 Variable *Reg = makeVectorOfOnes(Ty, RegNum);
7734 Variable *Reg = makeReg(Ty, RegNum);
7748 Variable *TargetX86Base<TraitsType>::makeVectorOfFabsMask(Type Ty,
7750 Variable *Reg = makeVectorOfMinusOnes(Ty, RegNum);
7757 TargetX86Base<TraitsType>::getMemoryOperandForStackSlot(Type Ty, Variable *Slot,
7767 Variable *Loc = makeReg(PointerType);
7797 /// Note #3. If Src is a Variable, the result will be an infinite-weight i8
7798 /// Variable with the RCX86_IsTrunc8Rcvr register class. As such, this helper
7802 Variable *TargetX86Base<TraitsType>::copyToReg8(Operand *Src, RegNumT RegNum) {
7806 Variable *Reg = makeReg(IceType_i8, RegNum);
7808 if (llvm::isa<Variable>(Src) || llvm::isa<ConstantRelocatable>(Src)) {
7809 Variable *SrcTruncable = makeReg(Ty);
7824 Variable *SrcRcvr = makeReg(IceType_i8);
7837 Variable *TargetX86Base<TraitsType>::copyToReg(Operand *Src, RegNumT RegNum) {
7839 Variable *Reg = makeReg(Ty, RegNum);
7863 // Substitute with an available infinite-weight variable if possible. Only do
7869 if (Variable *Subst = getContext().availabilityGet(From)) {
7884 Variable *Base = Mem->getBase();
7885 Variable *Index = Mem->getIndex();
7887 Variable *RegBase = nullptr;
7888 Variable *RegIndex = nullptr;
7891 RegBase = llvm::cast<Variable>(
7897 RegIndex = llvm::cast<Variable>(
7952 Variable *NewVar = makeReg(Ty, RegNum);
7990 if (auto *Var = llvm::dyn_cast<Variable>(From)) {
7991 // Check if the variable is guaranteed a physical register. This can happen
7992 // either when the variable is pre-colored or when it is assigned infinite
8000 // - Var is a rematerializable variable and rematerializable pass-through is
8004 Variable *NewVar = makeReg(Ty, RegNum);
8024 Variable *TargetX86Base<TraitsType>::legalizeToReg(Operand *From,
8026 return llvm::cast<Variable>(legalize(From, Legal_Reg, RegNum));
8064 } else if (auto *Var = llvm::dyn_cast<Variable>(Src1)) {
8080 auto *Base = llvm::dyn_cast<Variable>(Opnd);
8111 Variable *TargetX86Base<TraitsType>::makeReg(Type Type, RegNumT RegNum) {
8114 Variable *Reg = Func->makeVariable(Type);
8258 Variable *Reg = makeReg(IceType_i32, RegNum);
8268 Variable *TruncReg = makeReg(Immediate->getType(), RegNum);
8285 Variable *Reg = makeReg(Immediate->getType(), RegNum);
8288 constexpr Variable *NoBase = nullptr;
8357 Variable *RegTemp = makeReg(MemOperand->getOffset()->getType(), RegNum);
8387 Variable *RegTemp = makeReg(IceType_i32);
8392 constexpr Variable *NoBase = nullptr;
8396 // If we have a base variable here, we should add the lea instruction
8397 // to add the value of the base variable to RegTemp. If there is no
8398 // base variable, we won't need this lea instruction.
